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Searched refs:CLDO_CTL_CLK_SEL_REG (Results 1 - 5 of 5) sorted by relevance

/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/drivers/pwm/
H A Dhi_pwm.c128 hi_reg_clrbit(CLDO_CTL_CLK_SEL_REG, 0); in hi_pwm_set_clock()
130 hi_reg_setbit(CLDO_CTL_CLK_SEL_REG, 0); in hi_pwm_set_clock()
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/commonboot/
H A Dhi3861_platform.h84 #define CLDO_CTL_CLK_SEL_REG (CLDO_CTL_RB_BASE + 0x38) macro
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/flashboot/drivers/flash/
H A Dhi_flashboot_flash.c280 hi_reg_setbit(CLDO_CTL_CLK_SEL_REG, 1); in flash_clk_config()
302 hi_reg_setbit(CLDO_CTL_CLK_SEL_REG, 0); in flash_clk_config()
/device/soc/hisilicon/hi3861v100/sdk_liteos/boot/loaderboot/drivers/flash/
H A Dhi_loaderboot_flash.c228 hi_reg_setbit(CLDO_CTL_CLK_SEL_REG, 1); in flash_clk_config()
248 hi_reg_setbit(CLDO_CTL_CLK_SEL_REG, 0); in flash_clk_config()
/device/soc/hisilicon/hi3861v100/sdk_liteos/include/
H A Dhi3861_platform_base.h101 #define CLDO_CTL_CLK_SEL_REG (CLDO_CTL_RB_BASE_ADDR + 0x38) macro

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