/arkcompiler/runtime_core/static_core/runtime/fibers/arch/amd64/ |
H A D | helpers.S | 20 /// the register named tmp_reg as a temporary 21 .macro STORE_CONTEXT ctx_baseaddr_reg, tmp_reg 32 movq (%rsp), \tmp_reg 33 movq \tmp_reg, GPR_O(RIP)(\ctx_baseaddr_reg) 35 leaq 8(%rsp), \tmp_reg 36 movq \tmp_reg, GPR_O(RSP)(\ctx_baseaddr_reg) 38 leaq FP_O(FPENV)(\ctx_baseaddr_reg), \tmp_reg 42 fnstenv (\tmp_reg) 43 fldenv (\tmp_reg)
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H A D | get.S | 28 STORE_CONTEXT ctx_baseaddr_reg=%rdi, tmp_reg=%rcx
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H A D | switch.S | 31 STORE_CONTEXT ctx_baseaddr_reg=%rdi, tmp_reg=%rcx
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/arkcompiler/runtime_core/static_core/runtime/bridge/arch/arm/ |
H A D | compiled_code_to_runtime_bridge_arm.S | 18 .macro SAVE_CALLEE_GP_REGS base_reg, tmp_reg, offset 19 add \tmp_reg, \base_reg, #(\offset - CALLEE_REG0_OFFSET) 20 stm \tmp_reg, {r4-r10} 30 .macro RESTORE_CALLEE_GP_REGS base_reg, tmp_reg, offset 31 add \tmp_reg, \base_reg, #(\offset - CALLEE_REG0_OFFSET) 32 ldm \tmp_reg, {r4-r10} 42 .macro SAVE_CALLEE_FP_REGS base_reg, tmp_reg, offset 43 add \tmp_reg, \base_reg, #(\offset - CALLEE_VREG0_OFFSET) 44 vstm \tmp_reg, {d8-d15} 55 .macro RESTORE_CALLEE_FP_REGS base_reg, tmp_reg, offse [all...] |
/arkcompiler/runtime_core/compiler/optimizer/templates/ |
H A D | codegen_arm64.rb | 34 def tmp_reg method in Codegen 49 auto tmp_reg = #{tmp 'u64'}; 51 __ Ldr(tmp_reg, arg_mem); 53 auto safepoint_mem = vixl::aarch64::MemOperand(tmp_reg, flag_addr_offset);
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/arkcompiler/runtime_core/static_core/compiler/optimizer/templates/ |
H A D | codegen_arm64.rb | 34 def tmp_reg method in Codegen 49 auto tmp_reg = #{tmp 'u64'}; 51 __ Ldr(tmp_reg, arg_mem); 53 auto safepoint_mem = vixl::aarch64::MemOperand(tmp_reg, flag_addr_offset);
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/arkcompiler/runtime_core/static_core/runtime/bridge/arch/aarch64/ |
H A D | interpreter_to_compiled_code_bridge_aarch64.S | 42 .macro PUSH_ARG arg_reg, tag_reg, gpr_ptr, fpr_ptr, stack_ptr, tmp_reg, next_label 50 and \tmp_reg, \arg_reg, #0xFFFFFFFF 52 csel \arg_reg, \tmp_reg, \arg_reg, eq 57 sub \tmp_reg, \gpr_ptr, x9 58 cmp \tmp_reg, #64 67 cmp \tmp_reg, #56 76 sub \tmp_reg, x9, \fpr_ptr 77 cmp \tmp_reg, #64
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/arkcompiler/runtime_core/static_core/runtime/bridge/arch/amd64/ |
H A D | interpreter_to_compiled_code_bridge_amd64.S | 50 .macro PUSH_ARG arg_reg, tag_reg, gpr_ptr, fpr_ptr, stack_ptr, tmp_reg, next_label 67 movq \gpr_ptr, \tmp_reg 68 subq %r8, \tmp_reg 69 cmpq $48, \tmp_reg 80 cmpq $40, \tmp_reg 93 movq %r8, \tmp_reg 94 subq \fpr_ptr, \tmp_reg 95 cmpq $64, \tmp_reg
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/arkcompiler/runtime_core/compiler/tests/aarch32/ |
H A D | encoder32_test.cpp | 3234 auto tmp_reg = test->GetParameter(TypeInfo(T(0)), 1); in TestStoreExclusiveFailed() local 3238 test->GetEncoder()->EncodeStrExclusive(result, tmp_reg, param_0, is_release); in TestStoreExclusiveFailed() 3262 Reg tmp_reg(4, TypeInfo(T(0))); in TestStoreExclusive() 3265 test->GetEncoder()->EncodeLdrExclusive(tmp_reg, param_0, false); in TestStoreExclusive()
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/arkcompiler/runtime_core/compiler/tests/aarch64/ |
H A D | encoder64_test.cpp | 3350 auto tmp_reg = test->GetParameter(TypeInfo(T(0)), 1); in TestStoreExclusiveFailed() local 3354 test->GetEncoder()->EncodeStrExclusive(result, tmp_reg, param_0, is_release); in TestStoreExclusiveFailed() 3377 Reg tmp_reg(test->GetRegfile()->GetZeroReg().GetId(), TypeInfo(T(0))); in TestStoreExclusive() 3380 test->GetEncoder()->EncodeLdrExclusive(tmp_reg, param_0, false); in TestStoreExclusive()
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