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Searched refs:regs (Results 1 - 25 of 70) sorted by relevance

123

/arkcompiler/runtime_core/static_core/runtime/interpreter/
H A Dstate.h109 return BytecodeInstruction(arch::regs::GetPc()); in GetInst()
114 arch::regs::SetPc(inst.GetAddress()); in SetInst()
119 return arch::regs::GetFrame(); in GetFrame()
124 arch::regs::SetFrame(frame); in SetFrame()
125 arch::regs::SetMirrorFp( in SetFrame()
131 return arch::regs::GetDispatchTable(); in GetDispatchTable()
136 return arch::regs::SetDispatchTable(dispatchTable); in SetDispatchTable()
141 return arch::regs::GetThread(); in GetThread()
146 arch::regs::SetThread(thread); in SetThread()
153 fpSpill_ = arch::regs in SaveState()
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H A Dacc_vregister-inl.h47 return arch::regs::GetAccValue(); in GetValue()
52 arch::regs::SetAccValue(value); in SetValue()
57 return arch::regs::GetAccTag(); in GetTag()
62 arch::regs::SetAccTag(value); in SetTag()
/arkcompiler/runtime_core/static_core/runtime/tests/
H A Ddebugger_test.cpp86 static void SetVRegs(Frame *frame, std::vector<VRegValue> &regs) in SetVRegs() argument
89 for (size_t i = 0; i < regs.size(); i++) { in SetVRegs()
90 if (regs[i].isRef) { in SetVRegs()
91 frameHandler.GetVReg(i).SetReference(ToPtr(regs[i].value)); in SetVRegs()
93 frameHandler.GetVReg(i).SetPrimitive(static_cast<int64_t>(regs[i].value)); in SetVRegs()
106 static void CheckFrame(Frame *frame, std::vector<VRegValue> &regs, const MethodInfo &methodInfo) in CheckFrame() argument
108 SetVRegs(frame, regs); in CheckFrame()
127 EXPECT_EQ(debugFrame.GetVReg(i), regs[i].value); in CheckFrame()
128 EXPECT_EQ(debugFrame.GetVRegKind(i), regs[i].isRef ? tooling::PtFrame::RegisterKind::REFERENCE in CheckFrame()
133 EXPECT_EQ(debugFrame.GetArgument(i), regs[ in CheckFrame()
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/arkcompiler/ets_frontend/es2panda/compiler/core/
H A DregAllocator.cpp78 std::array<VReg *, IRNode::MAX_REG_OPERAND> regs {}; in Run()
79 auto regCnt = ins->Registers(&regs); in Run()
84 auto registers = Span<VReg *>(regs.data(), regs.data() + regCnt); in Run()
97 std::array<VReg *, IRNode::MAX_REG_OPERAND> regs {}; in Run()
98 auto regCnt = ins->Registers(&regs); in Run()
100 auto registers = Span<VReg *>(regs.data(), regs.data() + regCnt); in Run()
118 throw Error(ErrorType::GENERIC, "Can't adjust spill insns when regs run out"); in AdjustInsRegWhenHasSpill()
126 std::array<VReg *, IRNode::MAX_REG_OPERAND> regs {}; in AdjustInsRegWhenHasSpill()
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/arkcompiler/ets_runtime/ecmascript/platform/unix/ohos/
H A Dbacktrace.cpp51 static inline ARK_INLINE void GetPcFpRegs([[maybe_unused]] void *regs) in GetPcFpRegs() argument
57 : [base] "+r"(regs) in GetPcFpRegs()
66 uintptr_t regs[2] = {0}; // 2: pc and fp reg in GetPcs() local
67 GetPcFpRegs(regs); in GetPcs()
68 uintptr_t pc = regs[0]; in GetPcs()
69 uintptr_t fp = regs[1]; in GetPcs()
/arkcompiler/runtime_core/compiler/tests/aarch32/
H A Dregister32_test.cpp70 std::vector<Reg> regs; in TEST_F() local
72 regs.push_back(encoder.AcquireScratchRegister(INT64_TYPE)); in TEST_F()
76 for (auto reg : regs) { in TEST_F()
81 regs.clear(); in TEST_F()
83 regs.push_back(encoder.AcquireScratchRegister(FloatType)); in TEST_F()
88 for (auto reg : regs) { in TEST_F()
/arkcompiler/runtime_core/compiler/tests/amd64/
H A Dregister64_test.cpp70 std::vector<Reg> regs; in TEST_F() local
72 regs.push_back(encoder.AcquireScratchRegister(INT64_TYPE)); in TEST_F()
76 for (auto reg : regs) { in TEST_F()
81 regs.clear(); in TEST_F()
83 regs.push_back(encoder.AcquireScratchRegister(FloatType)); in TEST_F()
88 for (auto reg : regs) { in TEST_F()
/arkcompiler/runtime_core/compiler/tests/aarch64/
H A Dregister64_test.cpp67 std::vector<Reg> regs; in TEST_F() local
69 regs.push_back(encoder.AcquireScratchRegister(INT64_TYPE)); in TEST_F()
73 for (auto reg : regs) { in TEST_F()
78 regs.clear(); in TEST_F()
80 regs.push_back(encoder.AcquireScratchRegister(FloatType)); in TEST_F()
85 for (auto reg : regs) { in TEST_F()
/arkcompiler/runtime_core/static_core/compiler/tests/aarch32/
H A Dregister32_test.cpp67 std::vector<Reg> regs; in TEST_F() local
69 regs.push_back(encoder.AcquireScratchRegister(INT64_TYPE)); in TEST_F()
73 for (auto reg : regs) { in TEST_F()
78 regs.clear(); in TEST_F()
80 regs.push_back(encoder.AcquireScratchRegister(floatType)); in TEST_F()
85 for (auto reg : regs) { in TEST_F()
/arkcompiler/runtime_core/static_core/compiler/tests/aarch64/
H A Dregister64_test.cpp64 std::vector<Reg> regs; in TEST_F() local
66 regs.push_back(encoder.AcquireScratchRegister(INT64_TYPE)); in TEST_F()
70 for (auto reg : regs) { in TEST_F()
75 regs.clear(); in TEST_F()
77 regs.push_back(encoder.AcquireScratchRegister(floatType)); in TEST_F()
82 for (auto reg : regs) { in TEST_F()
/arkcompiler/runtime_core/static_core/compiler/tests/amd64/
H A Dregister64_test.cpp67 std::vector<Reg> regs; in TEST_F() local
69 regs.push_back(encoder.AcquireScratchRegister(INT64_TYPE)); in TEST_F()
73 for (auto reg : regs) { in TEST_F()
78 regs.clear(); in TEST_F()
80 regs.push_back(encoder.AcquireScratchRegister(floatType)); in TEST_F()
85 for (auto reg : regs) { in TEST_F()
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch32/
H A Dcallconv.cpp119 uint8_t Aarch32CallingConvention::PushRegs(RegMask regs, VRegMask vregs, bool isCallee) in PushRegs() argument
123 if (regs.test(lr)) { in PushRegs()
124 regs.reset(lr); in PushRegs()
127 if (regs.test(fp)) { in PushRegs()
128 regs.reset(fp); in PushRegs()
134 for (size_t i = 0; i < regs.size(); ++i) { in PushRegs()
135 if (regs.test(i)) { in PushRegs()
141 if (((regs.count() + vregs.count()) & 1U) == 1) { in PushRegs()
157 uint8_t Aarch32CallingConvention::PopRegs(RegMask regs, VRegMask vregs, bool isCallee) in PopRegs() argument
162 if (regs in PopRegs()
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/arkcompiler/ets_frontend/ets2panda/compiler/core/
H A DregAllocator.cpp148 std::array<VReg *, IRNode::MAX_REG_OPERAND> regs {}; in Run()
149 const auto regCnt = ins->Registers(&regs); in Run()
151 Span<VReg *>(regs.data(), regs.data() + (spillMax == std::numeric_limits<int32_t>::max() ? regCnt : spillMax)); in Run()
217 std::array<VReg *, IRNode::MAX_REG_OPERAND> regs {}; in Run()
218 const auto regCnt = ins->Registers(&regs); in Run()
219 const auto registers = Span<VReg *>(regs.data(), regs.data() + regCnt); in Run()
/arkcompiler/ets_frontend/merge_abc/src/
H A DassemblyInsProto.cpp22 for (const auto &reg : insn.regs) { in Serialize()
50 insn.regs.reserve(protoInsn.regs_size()); in Deserialize()
51 for (const auto &protoReg : protoInsn.regs()) { in Deserialize()
52 insn.regs.push_back(static_cast<uint16_t>(protoReg)); in Deserialize()
/arkcompiler/runtime_core/assembler/
H A Dassembly-ins.cpp24 for (const auto &reg : this->regs) { in RegsToString()
89 if (idx >= regs.size()) { in RegToString()
101 if (print_args && regs[idx] >= first_arg_idx) { in RegToString()
102 translator << "a" << regs[idx] - first_arg_idx; in RegToString()
104 translator << "v" << regs[idx]; in RegToString() local
H A Dassembly-ins.h101 std::vector<uint16_t> regs; /* list of arguments - registers */ member
120 return regs.size() + ids.size() + imms.size(); in OperandListLength()
178 return regs; in Uses()
194 ASSERT(static_cast<size_t>(idx) < regs.size()); in Uses()
195 res.emplace_back(regs[idx]); in Uses()
207 return regs[def_idx]; in Def()
218 for (auto reg : regs) { in IsValidToEmit()
/arkcompiler/runtime_core/static_core/assembler/
H A Dassembly-ins.cpp24 for (const auto &reg : this->regs) { in RegsToString()
88 if (idx >= regs.size()) { in RegToString()
100 if (printArgs && regs[idx] >= firstArgIdx) { in RegToString()
101 translator << "a" << regs[idx] - firstArgIdx; in RegToString()
103 translator << "v" << regs[idx]; in RegToString() local
H A Dassembly-ins.h112 std::vector<uint16_t> regs; /* list of arguments - registers */ member
134 return regs.size() + ids.size() + imms.size(); in OperandListLength()
192 return regs; in Uses()
208 ASSERT(static_cast<size_t>(idx) < regs.size()); in Uses()
209 res.emplace_back(regs[idx]); in Uses()
221 return regs[defIdx]; in Def()
232 for (auto reg : regs) { in IsValidToEmit()
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch64/
H A Dcallconv.cpp64 void Aarch64CallingConvention::PrepareToPushPopRegs(vixl::aarch64::CPURegList regs, vixl::aarch64::CPURegList vregs, in PrepareToPushPopRegs() argument
67 if ((regs.GetCount() % IMM_2) == 1) { in PrepareToPushPopRegs()
68 ASSERT((regs.GetList() & (UINT64_C(1) << vixl::aarch64::xzr.GetCode())) == 0); in PrepareToPushPopRegs()
69 regs.Combine(vixl::aarch64::xzr); in PrepareToPushPopRegs()
79 size_t Aarch64CallingConvention::PushRegs(vixl::aarch64::CPURegList regs, vixl::aarch64::CPURegList vregs, in PushRegs() argument
82 PrepareToPushPopRegs(regs, vregs, isCallee); in PushRegs()
84 GetMasm()->PushCPURegList(regs); in PushRegs()
85 return vregs.GetCount() + regs.GetCount(); in PushRegs()
88 size_t Aarch64CallingConvention::PopRegs(vixl::aarch64::CPURegList regs, vixl::aarch64::CPURegList vregs, bool isCallee) in PopRegs() argument
90 PrepareToPushPopRegs(regs, vreg in PopRegs()
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H A Dregfile.cpp54 void Aarch64RegisterDescription::SetCalleeSaved(const ArenaVector<Reg> &regs) in SetCalleeSaved() argument
60 bool vectorUsed = IsRegUsed(regs, Reg(i, FLOAT64_TYPE)); in SetCalleeSaved()
66 bool scalarUsed = IsRegUsed(regs, Reg(i, INT64_TYPE)); in SetCalleeSaved()
83 void Aarch64RegisterDescription::SetUsedRegs(const ArenaVector<Reg> &regs) in SetUsedRegs() argument
85 usedRegs_ = regs; in SetUsedRegs()
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/amd64/
H A Dregfile.cpp51 void Amd64RegisterDescription::SetCalleeSaved(const ArenaVector<Reg> &regs) in SetCalleeSaved() argument
57 bool scalarUsed = IsRegUsed(regs, Reg(i, INT64_TYPE)); in SetCalleeSaved()
63 bool vectorUsed = IsRegUsed(regs, Reg(i, FLOAT64_TYPE)); in SetCalleeSaved()
74 void Amd64RegisterDescription::SetUsedRegs(const ArenaVector<Reg> &regs) in SetUsedRegs() argument
76 usedRegs_ = regs; in SetUsedRegs()
/arkcompiler/ets_frontend/ets2panda/ir/
H A Dirnode.h149 virtual size_t Registers([[maybe_unused]] std::array<VReg *, MAX_REG_OPERAND> *regs) = 0;
150 virtual size_t Registers([[maybe_unused]] std::array<const VReg *, MAX_REG_OPERAND> *regs) const = 0;
151 virtual size_t OutRegisters([[maybe_unused]] std::array<OutVReg, MAX_REG_OPERAND> *regs) const = 0;
/arkcompiler/runtime_core/static_core/verification/absint/
H A Dabs_int_inl.h111 1(current). Conflicts are reported as warnings, conflicting regs are removed fro resulting context.
1717 bool CheckCallCtor(Method const *ctor, Span<int> regs) in CheckCallCtor() argument
1732 bool check = CheckMethodArgs(ctorNameGetter, ctor, regs, objType); in CheckCallCtor()
1741 bool CheckCtor(Span<int> regs) in CheckCtor() argument
1753 return CheckArrayCtor<FORMAT>(type, regs); in CheckCtor()
1777 return CheckCallCtor<FORMAT>(ctor, regs); in CheckCtor()
1790 std::array<int, 4UL> regs {vs1, vs2, vs3, vs4}; in HandleInitobj()
1791 return CheckCtor<FORMAT>(Span {regs}); in HandleInitobj()
1802 std::array<int, 2UL> regs {vs1, vs2}; in HandleInitobjShort()
1803 return CheckCtor<FORMAT>(Span {regs}); in HandleInitobjShort()
1813 std::vector<int> regs; HandleInitobjRange() local
2525 CheckLaunch(Method const *method, Span<int> regs) CheckLaunch() argument
2635 std::vector<int> regs; HandleEtsLaunchRange() local
2706 std::vector<int> regs; HandleEtsLaunchVirtRange() local
3194 CheckMethodArgs(NameGetter nameGetter, Method const *method, Span<int> regs, Type constructedType = Type {}) CheckMethodArgs() argument
3250 CheckCall(Method const *method, Span<int> regs) CheckCall() argument
3431 std::vector<int> regs; HandleCallRange() local
3558 std::vector<int> regs; HandleCallVirtRange() local
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/arkcompiler/runtime_core/static_core/libllvmbackend/transforms/passes/ark_frame_lowering/
H A Dframe_builder.cpp303 std::vector<int> regs; in EmitCSRSaveRestoreCode() local
308 regs.push_back(i); in EmitCSRSaveRestoreCode()
312 if (regs.size() % 2U == 1) { in EmitCSRSaveRestoreCode()
313 regs.push_back(arm_frame_helpers::INVALID_REGISTER); in EmitCSRSaveRestoreCode()
317 for (i = 0; i < regs.size(); i += 2U) { in EmitCSRSaveRestoreCode()
318 auto [reg_a, reg_b] = std::minmax(regs[i + 0U], regs[i + 1U]); in EmitCSRSaveRestoreCode()
/arkcompiler/runtime_core/assembler/tests/
H A Dassembler_ins_test.cpp130 ins.regs.push_back(reg1); in HWTEST_F()
131 ins.regs.push_back(reg2); in HWTEST_F()
181 ins.regs.clear(); in HWTEST_F()
197 ins.regs.push_back(1); in HWTEST_F()
213 ins.regs.push_back(reg1); in HWTEST_F()
214 ins.regs.push_back(reg2); in HWTEST_F()

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