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Searched refs:predGate (Results 1 - 2 of 2) sorted by relevance

/arkcompiler/ets_runtime/ecmascript/compiler/
H A Dverifier.cpp126 for (const auto &predGate : gateAcc.ConstIns(bbGate)) { in RunCFGSoundnessCheck()
127 if (gateAcc.IsState(predGate) || circuit->GetOpCode(predGate) == OpCode::STATE_ENTRY) { in RunCFGSoundnessCheck()
128 if (bbGatesAddrToIdx.count(predGate) == 0) { in RunCFGSoundnessCheck()
131 LOG_COMPILER(ERROR) << "(id=" << circuit->GetId(predGate) << ") is pred of " in RunCFGSoundnessCheck()
134 LOG_COMPILER(ERROR) << "(id=" << circuit->GetId(predGate) << ") is unreachable from entry"; in RunCFGSoundnessCheck()
237 GateRef predGate = *i; in RunFixedGatesRelationsCheck() local
238 if (ac.IsFixed(predGate) && in RunFixedGatesRelationsCheck()
242 auto a = bbGatesAddrToIdx.at(circuit->GetIn(predGate, 0)); in RunFixedGatesRelationsCheck()
249 << circuit->GetId(predGate) in RunFixedGatesRelationsCheck()
274 GateRef predGate = *i; RunFlowCyclesFind() local
286 GateRef predGate = *i; RunFlowCyclesFind() local
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H A Dscheduler.cpp98 for (const auto &predGate : preGates) { in CalculateDominatorTree()
99 if (bbGatesAddrToIdx.count(predGate) > 0) { in CalculateDominatorTree()
100 size_t preGateIdx = bbGatesAddrToIdx[predGate]; in CalculateDominatorTree()
313 const auto &predGate = predGates[idx]; in CalculateSchedulingUpperBound() local
314 CheckUnschedulable(predGate); in CalculateSchedulingUpperBound()
321 newState.curGate = predGate; in CalculateSchedulingUpperBound()
322 acc.GetIns(predGate, newPredGates); in CalculateSchedulingUpperBound()

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