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Searched refs:Shl (Results 1 - 25 of 44) sorted by relevance

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/arkcompiler/runtime_core/static_core/bytecode_optimizer/tests/
H A Dbc_lowering_test.cpp326 INST(9U, Opcode::Shl).u32().Inputs(0U, 1U); in TEST_F()
327 INST(11U, Opcode::Shl).u32().Inputs(0U, 2U); in TEST_F()
328 INST(12U, Opcode::Shl).u8().Inputs(0U, 1U); in TEST_F()
333 INST(30U, Opcode::Shl).s64().Inputs(24U, 25U); in TEST_F()
335 INST(32U, Opcode::Shl).s32().Inputs(0U, 27U); in TEST_F()
366 INST(11U, Opcode::Shl).u32().Inputs(0U, 2U); in TEST_F()
367 INST(12U, Opcode::Shl).u8().Inputs(0U, 1U); in TEST_F()
372 INST(30U, Opcode::Shl).s64().Inputs(24U, 25U); in TEST_F()
374 INST(32U, Opcode::Shl).s32().Inputs(0U, 27U); in TEST_F()
/arkcompiler/runtime_core/static_core/compiler/tests/
H A Dpeepholes_test.cpp2077 INST(3U, Opcode::Shl).u64().Inputs(0U, 1U); in TEST_F()
2078 INST(4U, Opcode::Shl).u64().Inputs(0U, 2U); in TEST_F()
2103 INST(3U, Opcode::Shl).u64().Inputs(0U, 1U); in TEST_F()
2104 INST(4U, Opcode::Shl).u64().Inputs(3U, 2U); in TEST_F()
2115 ASSERT_EQ(INS(3U).GetOpcode(), Opcode::Shl); in TEST_F() member in ark::compiler::Opcode
2117 ASSERT_EQ(INS(4U).GetOpcode(), Opcode::Shl); in TEST_F() member in ark::compiler::Opcode
2135 INST(3U, Opcode::Shl).u16().Inputs(0U, 1U); in TEST_F()
2136 INST(4U, Opcode::Shl).u32().Inputs(3U, 2U); in TEST_F()
2146 ASSERT_EQ(INS(3U).GetOpcode(), Opcode::Shl); in TEST_F() member in ark::compiler::Opcode
2149 ASSERT_EQ(INS(4U).GetOpcode(), Opcode::Shl); in TEST_F() member in ark::compiler::Opcode
2201 ASSERT_EQ(INS(5U).GetOpcode(), Opcode::Shl); TEST_F() member in ark::compiler::Opcode
2205 ASSERT_EQ(INS(6U).GetOpcode(), Opcode::Shl); TEST_F() member in ark::compiler::Opcode
2209 ASSERT_EQ(INS(7U).GetOpcode(), Opcode::Shl); TEST_F() member in ark::compiler::Opcode
2213 ASSERT_EQ(INS(8U).GetOpcode(), Opcode::Shl); TEST_F() member in ark::compiler::Opcode
[all...]
H A Dlowering_test.cpp318 INST(9U, Opcode::Shl).u32().Inputs(0U, 1U); in TEST_F()
319 INST(10U, Opcode::Shl).u64().Inputs(0U, 1U); in TEST_F()
320 INST(11U, Opcode::Shl).u64().Inputs(0U, 2U); in TEST_F()
321 INST(12U, Opcode::Shl).u8().Inputs(0U, 1U); in TEST_F()
349 ASSERT_EQ(INS(11U).GetPrev()->GetOpcode(), Opcode::Shl); in TEST_F() member in ark::compiler::Opcode
1690 std::initializer_list<ShiftOpPair> shiftOps = {{Opcode::Shl, Opcode::ShlI, ShiftType::LSL}, in TEST_F()
1758 std::initializer_list<ShiftOpPair> shiftOps = {{Opcode::Shl, Opcode::ShlI, ShiftType::LSL}, in TEST_F()
1844 std::initializer_list<ShiftOpPair> shiftOps = {{Opcode::Shl, Opcode::ShlI, ShiftType::LSL}, in TEST_F()
1865 std::initializer_list<ShiftOpPair> shiftOps = {{Opcode::Shl, Opcode::ShlI, ShiftType::LSL}, in TEST_F()
1972 std::initializer_list<ShiftOpPair> shiftOps = {{Opcode::Shl, Opcod in TEST_F()
[all...]
H A Dinst_generator_test.cpp265 case Opcode::Shl: in FixParams()
603 case Opcode::Shl: in DoLogic()
905 OneTest(statGen, Opcode::Shl); in RandomTestsPart1()
965 OneTestShift(statGen, Opcode::Shl); in NotRandomTests()
H A Dbounds_analysis_test.cpp606 EXPECT_EQ(r.Shl(r), max); in TEST_F()
607 EXPECT_EQ(r.Shl(neg), max); in TEST_F()
609 EXPECT_EQ(r.Shl(BoundsRange(2U)), BoundsRange(16U, 32U)); in TEST_F()
610 EXPECT_EQ(BoundsRange(-1L).Shl(BoundsRange(4U)), BoundsRange(0xFFFFFFFFFFFFFFF0U)); in TEST_F()
611 EXPECT_EQ(BoundsRange(-1L, 16U).Shl(BoundsRange(4U)), BoundsRange(0xFFFFFFFFFFFFFFF0U, 256U)); in TEST_F()
612 EXPECT_EQ(BoundsRange(16U, 0x0FFFFFFFFFFFFFFFU).Shl(BoundsRange(4U)), BoundsRange()); in TEST_F()
H A Dcse_test.cpp68 INST(17U, Opcode::Shl).u64().Inputs(0U, 1U); in SRC_GRAPH()
78 INST(26U, Opcode::Shl).u64().Inputs(0U, 1U); in SRC_GRAPH()
115 INST(17U, Opcode::Shl).u64().Inputs(0U, 1U); in OUT_GRAPH()
H A Dinst_generator.h208 {Opcode::Shl, integerTypes_},
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/src/cg/x86_64/
H A Dx64_emitter.cpp810 assmbler.Shl(kB, TransferReg(opnd0), TransferReg(opnd1)); in EmitInsn()
813 assmbler.Shl(kW, TransferReg(opnd0), TransferReg(opnd1)); in EmitInsn()
816 assmbler.Shl(kL, TransferReg(opnd0), TransferReg(opnd1)); in EmitInsn()
819 assmbler.Shl(kQ, TransferReg(opnd0), TransferReg(opnd1)); in EmitInsn()
822 assmbler.Shl(kB, TransferImm(opnd0), TransferReg(opnd1)); in EmitInsn()
825 assmbler.Shl(kW, TransferImm(opnd0), TransferReg(opnd1)); in EmitInsn()
828 assmbler.Shl(kL, TransferImm(opnd0), TransferReg(opnd1)); in EmitInsn()
831 assmbler.Shl(kQ, TransferImm(opnd0), TransferReg(opnd1)); in EmitInsn()
834 assmbler.Shl(kB, TransferReg(opnd0), TransferMem(opnd1, funcUniqueId)); in EmitInsn()
837 assmbler.Shl(k in EmitInsn()
[all...]
H A Dasm_assembler.cpp1115 void AsmAssembler::Shl(InsnSize insnSize, Reg srcReg, Reg destReg) in Shl() function in assembler::AsmAssembler
1124 void AsmAssembler::Shl(InsnSize insnSize, const ImmOpnd &immOpnd, Reg reg) in Shl() function in assembler::AsmAssembler
1133 void AsmAssembler::Shl(InsnSize insnSize, Reg reg, const Mem &mem) in Shl() function in assembler::AsmAssembler
1142 void AsmAssembler::Shl(InsnSize insnSize, const ImmOpnd &immOpnd, const Mem &mem) in Shl() function in assembler::AsmAssembler
H A Delf_assembler.cpp1724 void ElfAssembler::Shl(InsnSize insnSize, Reg srcReg, Reg destReg) in Shl() function in ElfAssembler
1729 void ElfAssembler::Shl(InsnSize insnSize, const ImmOpnd &immOpnd, Reg reg) in Shl() function in ElfAssembler
1735 void ElfAssembler::Shl(InsnSize insnSize, Reg reg, const Mem &mem) in Shl() function in ElfAssembler
1740 void ElfAssembler::Shl(InsnSize insnSize, const ImmOpnd &immOpnd, const Mem &mem) in Shl() function in ElfAssembler
/arkcompiler/ets_runtime/ecmascript/compiler/
H A Dcommon_stub_csigns.h36 V(Shl) \
H A Doperations_stub_builder.h50 GateRef Shl(GateRef glue, GateRef left, GateRef right, ProfileOperation callback = ProfileOperation());
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/include/cg/x86_64/assembler/
H A Dasm_assembler.h242 void Shl(InsnSize insnSize, Reg srcReg, Reg destReg) override;
243 void Shl(InsnSize insnSize, const ImmOpnd &immOpnd, Reg reg) override;
244 void Shl(InsnSize insnSize, Reg reg, const Mem &mem) override;
245 void Shl(InsnSize insnSize, const ImmOpnd &immOpnd, const Mem &mem) override;
H A Dassembler.h255 virtual void Shl(InsnSize insnSize, Reg srcReg, Reg destReg) = 0;
256 virtual void Shl(InsnSize insnSize, const ImmOpnd &immOpnd, Reg reg) = 0;
257 virtual void Shl(InsnSize insnSize, Reg reg, const Mem &mem) = 0;
258 virtual void Shl(InsnSize insnSize, const ImmOpnd &immOpnd, const Mem &mem) = 0;
H A Delf_assembler.h233 void Shl(InsnSize insnSize, Reg srcReg, Reg destReg) override;
234 void Shl(InsnSize insnSize, const ImmOpnd &immOpnd, Reg reg) override;
235 void Shl(InsnSize insnSize, Reg reg, const Mem &mem) override;
236 void Shl(InsnSize insnSize, const ImmOpnd &immOpnd, const Mem &mem) override;
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_util/include/
H A Dmpl_int_val.h359 IntVal Shl(const IntVal &shift, PrimType pType) const in Shl() function in maple::IntVal
361 return Shl(shift.value, pType); in Shl()
364 IntVal Shl(uint64 shift, PrimType pType) const in Shl() function in maple::IntVal
/arkcompiler/runtime_core/static_core/compiler/optimizer/optimizations/
H A Dcse.h184 case Opcode::Shl: in IsLegalExp()
H A Dpeepholes.cpp460 CreateAndInsertInst(Opcode::Shl, inst, input0, power); in VisitMulOneConst()
616 // 2.Type Shl v1, v0 in VisitShr()
625 if (op1->GetOpcode() == Opcode::Shl && op2->IsConst() && op1->GetInput(1) == op2) { in VisitShr()
671 // 2.Type Shl v1, v0 in VisitAShr()
679 if (op1->GetOpcode() == Opcode::Shl && op2->IsConst() && op1->GetInput(1) == op2) { in VisitAShr()
1650 ASSERT(opc == Opcode::Shl || opc == Opcode::Shr || opc == Opcode::AShr); in TrySimplifyShifts()
1912 if (shl0->GetOpcode() != Opcode::Shl || !shl0->HasSingleUser()) { in CanReassociateShlShlAddSub()
1916 if (shl1->GetOpcode() != Opcode::Shl || !shl1->HasSingleUser() || shl1->GetInput(0) != shl0->GetInput(0)) { in CanReassociateShlShlAddSub()
2412 ASSERT(opc == Opcode::Shl || opc == Opcode::Shr || opc == Opcode::AShr); in TryCombineShiftConst()
2423 // If new_value > size_mask, result is always 0 for Shr and Shl, in TryCombineShiftConst()
[all...]
/arkcompiler/runtime_core/static_core/compiler/optimizer/analysis/
H A Dbounds_analysis.cpp224 BoundsRange BoundsRange::Shl(const BoundsRange &range, DataType::Type type) in Shl() function in ark::compiler::BoundsRange
861 CalcNewBoundsRangeBinary<Opcode::Shl>(v, inst); in VisitShl()
1489 return range0.Shl(range1, inst->GetType()); in CalcNewBoundsRangeShl()
1537 } else if constexpr (OPC == Opcode::Shl) { // NOLINT in CalcNewBoundsRangeBinary()
H A Dbounds_analysis.h82 BoundsRange Shl(const BoundsRange &range, DataType::Type type = DataType::INT64);
/arkcompiler/runtime_core/compiler/tests/
H A Dinst_generator.h163 {Opcode::Shl, integer_types_},
/arkcompiler/runtime_core/static_core/bytecode_optimizer/
H A Dbytecode_optimizer_isapi.rb386 %w[And Xor Or Shl Shr AShr].each do |op|
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/include/litecg/
H A Dlmir_builder.h411 Expr Shl(Type *type, Expr src1, Expr src2);
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/
H A Dencode.h49 DEF(Shl, BINARY_OPERATION) \
H A Dencode_visitor.h105 DEF(Shl); \

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