/arkcompiler/runtime_core/static_core/compiler/optimizer/optimizations/regalloc/ |
H A D | reg_alloc_linear_scan.cpp | 96 ASSERT(intervals.fixed.size() > interval->GetReg()); in PrepareInterval() 97 ASSERT(intervals.fixed[interval->GetReg()] == nullptr); in PrepareInterval() 98 intervals.fixed[interval->GetReg()] = interval; in PrepareInterval() 107 if (interval->NoDest() || interval->GetInst()->GetDstCount() > 1U || interval->GetReg() == ACC_REG_ID) { in PrepareInterval() 111 if (interval->IsPreassigned() && interval->GetReg() == GetGraph()->GetZeroReg()) { in PrepareInterval() 112 ASSERT(interval->GetReg() != INVALID_REG); in PrepareInterval() 151 if (!interval->IsPreassigned() || interval->IsSplitSibling() || interval->GetReg() == ACC_REG_ID) { in PreprocessPreassignedIntervals() 154 interval->SetPreassignedReg(regMap_.CodegenToRegallocReg(interval->GetReg())); in PreprocessPreassignedIntervals() 226 if (!IsIntervalRegFree(currentInterval, currentInterval->GetReg())) { in WalkIntervals() 269 if (interval->GetReg() ! in SplitAndSpill() [all...] |
H A D | reg_alloc_graph_coloring.cpp | 129 auto color = map.CodegenToRegallocReg(interv->GetReg()); in PrecolorIG() 436 if (interval->GetReg() == ACC_REG_ID) { in InitWorkingRanges() 440 if (interval->IsPreassigned() && interval->GetReg() == GetGraph()->GetZeroReg()) { in InitWorkingRanges() 441 ASSERT(interval->GetReg() != INVALID_REG); in InitWorkingRanges() 455 if (mask.IsSet(interval->GetReg())) { in InitWorkingRanges()
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H A D | reg_alloc_linear_scan.h | 163 if (interval == nullptr || interval->GetReg() >= regMap_.GetAvailableRegsCount()) { in EnumerateIntervals() 174 if (interval == nullptr || interval->GetReg() >= regMap_.GetAvailableRegsCount()) { in EnumerateIntersectedIntervals()
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H A D | reg_alloc_resolver.cpp | 138 auto regLocation = Location::MakeRegister(interval->GetReg(), interval->GetType()); in ResolveInputs() 386 auto reg = instInterval->GetReg(); in ResolveOutput()
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H A D | reg_alloc_base.cpp | 277 dst->GetInst()->GetBasicBlock()->GetGraph()->SetRegUsage(dst->GetReg(), dst->GetType()); in ConnectIntervals()
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/arkcompiler/runtime_core/static_core/compiler/tests/ |
H A D | live_registers_test.cpp | 60 ASSERT_EQ(mask.test(li->GetReg()), false); in TEST_F() 61 mask.set(li->GetReg()); in TEST_F() 67 ASSERT_EQ(mask.test(li->GetReg()), false); in TEST_F() 68 mask.set(li->GetReg()); in TEST_F() 74 ASSERT_EQ(mask.test(li->GetReg()), false); in TEST_F() 75 mask.set(li->GetReg()); in TEST_F() 81 ASSERT_EQ(mask.test(li->GetReg()), false); in TEST_F() 82 mask.set(li->GetReg()); in TEST_F() 89 ASSERT_EQ(mask.test(li->GetReg()), false); in TEST_F() 90 mask.set(li->GetReg()); in TEST_F() [all...] |
H A D | reg_alloc_graph_coloring_test.cpp | 34 EXPECT_EQ(paramLiveness->GetReg(), spillFill.SrcValue()); in GetParameterSpillFilll() 35 EXPECT_EQ(paramLiveness->GetSibling()->GetReg(), spillFill.DstValue()); in GetParameterSpillFilll()
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H A D | reg_alloc_linear_scan_test.cpp | 1134 SpillFillData expectedSf {LocationType::REGISTER, LocationType::REGISTER, param0->GetReg(), REG_FOR_SPLIT, in TEST_F() 1321 auto catchPhiReg = la.GetInstLifeIntervals(&INS(7U))->GetReg(); in TEST_F() 1328 auto ins4Reg = la.GetInstLifeIntervals(&INS(4U))->GetReg(); in TEST_F() 1479 ASSERT_FALSE(callerMask.Test(li->GetReg())); in TEST_F() 1629 EXPECT_EQ(const0->GetReg(), zeroReg); in TEST_F() 1630 EXPECT_EQ(nullptrInst->GetReg(), zeroReg); in TEST_F()
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/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/ |
H A D | scoped_tmp_reg.h | 75 Reg GetReg() const in GetReg() function in ark::compiler::ScopedTmpRegImpl 180 encoder->AddRegInLiveMask(GetReg()); in ScopedLiveTmpReg() 184 encoder->AddRegInLiveMask(GetReg()); in ScopedLiveTmpReg() 189 ASSERT(GetReg().IsValid()); 190 GetEncoder()->RemoveRegFromLiveMask(GetReg()); 196 if (GetReg().IsValid()) { 197 GetEncoder()->RemoveRegFromLiveMask(GetReg());
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H A D | slow_path.cpp | 197 ASSERT(tmpReg.GetReg().GetId() == tmpReg_.GetId()); in GenerateImpl() 214 if (tmpAddrReg.GetReg() != addrReg_) { in GenerateImpl() 232 ASSERT(methodReg.GetReg().GetId() == methodReg_.GetId()); in GenerateImpl() 233 codegen->CallRuntime(GetInst(), GetEntrypoint(), INVALID_REGISTER, RegMask::GetZeroMask(), methodReg.GetReg()); in GenerateImpl()
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H A D | codegen.cpp | 85 encoder->EncodeMov(Reg(li->GetReg(), FLOAT64_TYPE), in EncodeConstantMove() 89 encoder->EncodeMov(Reg(li->GetReg(), FLOAT32_TYPE), in EncodeConstantMove() 93 encoder->EncodeMov(Reg(li->GetReg(), INT32_TYPE), Imm(inst->CastToConstant()->GetRawValue())); in EncodeConstantMove() 96 encoder->EncodeMov(Reg(li->GetReg(), INT64_TYPE), Imm(inst->CastToConstant()->GetRawValue())); in EncodeConstantMove() 1277 Reg classOrig = classReg.GetReg().As(classType); in CreateMultiArrayCall() 1559 auto tmpReg64 = Reg(tmpReg.GetReg().GetId(), INT64_TYPE); in EmitResolveUnknownVirtual() 1573 auto tmpReg64 = Reg(tmpReg.GetReg().GetId(), INT64_TYPE); in EmitResolveVirtualAot() 1719 GetEncoder()->EncodeMov(tmp.GetReg(), Imm(methodAddr)); in EmitResolveStatic() 1720 GetEncoder()->EncodeLdr(tmp.GetReg(), false, MemRef(tmp.GetReg())); in EmitResolveStatic() [all...] |
H A D | encode_visitor.cpp | 622 auto tmp = scopedTmp.GetReg(); in VisitLoadArray() 644 auto tmp = scopedTmp.GetReg(); in VisitLoadCompressedStringChar() 869 encoder->EncodeMov(dst, Reg(tmpDst.GetReg().GetId(), dst.GetType())); in VisitLoadString() 1105 CHECK_EQ(tmpReg.GetReg().GetId(), encoder->GetTarget().GetTempRegsMask().GetMinRegister()); in VisitInitClass() 1106 enc->GetCodegen()->CreateJumpToClassResolverPltShared(inst, tmpReg.GetReg(), EntrypointId::CLASS_INIT_RESOLVER); in VisitInitClass() 1117 auto tmpI8 = enc->GetCodegen()->ConvertRegister(tmpReg.GetReg().GetId(), DataType::INT8); in VisitInitClass() 1195 constPool = tmpReg.GetReg().As(src.GetType()); in VisitGetGlobalVarAddress() 1240 CHECK_EQ(tmpReg.GetReg().GetId(), encoder->GetTarget().GetTempRegsMask().GetMinRegister()); in EncodeLoadAndInitClassInAot() 1241 enc->GetCodegen()->CreateJumpToClassResolverPltShared(inst, tmpReg.GetReg(), EntrypointId::CLASS_INIT_RESOLVER); in EncodeLoadAndInitClassInAot()
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/arkcompiler/runtime_core/static_core/verification/absint/ |
H A D | abs_int_inl.cpp | 56 const AbstractTypedValue &AbsIntInstructionHandler::GetReg(int regIdx) in GetReg() function in ark::verifier::AbsIntInstructionHandler 63 return GetReg(regIdx).GetAbstractType(); in GetRegType() 71 prevAtvImage = ToString(&GetReg(regIdx)); in SetReg()
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/arkcompiler/runtime_core/compiler/optimizer/optimizations/regalloc/ |
H A D | reg_alloc_graph_coloring.cpp | 117 auto color = map.CodegenToRegallocReg(interv->GetReg()); in PrecolorIG() 339 if (interval->GetReg() == ACC_REG_ID) { in InitWorkingRanges() 343 if (interval->IsPreassigned() && interval->GetReg() == INVALID_REG) { in InitWorkingRanges() 344 ASSERT(interval->GetReg() != INVALID_REG); in InitWorkingRanges() 358 if (mask.IsSet(interval->GetReg())) { in InitWorkingRanges()
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H A D | reg_alloc_base.cpp | 252 dst->GetInst()->GetBasicBlock()->GetGraph()->SetRegUsage(dst->GetReg(), dst->GetType()); in ConnectIntervals()
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H A D | reg_alloc_resolver.cpp | 241 auto reg = inst_interval->GetReg(); in ResolveOutput()
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/arkcompiler/runtime_core/compiler/tests/ |
H A D | reg_alloc_graph_coloring_test.cpp | 33 EXPECT_EQ(param_liveness->GetReg(), spill_fill.SrcValue()); in GetParameterSpillFilll() 34 EXPECT_EQ(param_liveness->GetSibling()->GetReg(), spill_fill.DstValue()); in GetParameterSpillFilll()
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/arkcompiler/runtime_core/static_core/compiler/optimizer/analysis/ |
H A D | reg_alloc_verifier.cpp | 57 return state.GetReg(location.GetValue() + (isHigh ? 1U : 0U)); in GetPhiLocationState() 72 return state->GetReg(location.GetValue() + (isHigh ? 1U : 0U)); in GetPhiLocationState() 178 return IsRegisterPair(Location::MakeRegister(li->GetReg()), li->GetType(), in IsRegisterPair() 288 return currentState_->GetReg(offset); in GetLocationState() 580 savedRegs_.push_back(currentState_->GetReg(reg)); in HandleSaveRestoreRegisters() 589 currentState_->GetReg(reg) = savedRegs_[reg]; in HandleSaveRestoreRegisters()
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H A D | reg_alloc_verifier.h | 172 LocationState &GetReg(Register reg) in GetReg() function in ark::compiler::BlockState 177 const LocationState &GetReg(Register reg) const
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/arkcompiler/runtime_core/static_core/irtoc/backend/compiler/ |
H A D | codegen_boundary.cpp | 152 ASSERT(target.GetReg().IsValid()); in IntrinsicTailCall() 154 src = target.GetReg(); in IntrinsicTailCall()
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/arkcompiler/runtime_core/static_core/plugins/ets/compiler/ |
H A D | codegen_intrinsics_ets.cpp | 153 num = tmp.GetReg(); in CreateStringBuilderAppendNumber() 197 auto reg1 = tmp1.GetReg().As(INT32_TYPE); in EncodeSbAppendString() 203 reg2 = tmp2.GetReg().As(INT32_TYPE); in EncodeSbAppendString()
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/arkcompiler/runtime_core/static_core/compiler/tests/aarch32/ |
H A D | encoder32_test_2.cpp | 1077 ASSERT_EQ(tmp1.GetReg(), target.GetLinkReg()); in TEST_F() 1079 ASSERT_NE(tmp2.GetReg(), target.GetLinkReg()); in TEST_F() 1082 ASSERT_EQ(tmp3.GetReg(), target.GetLinkReg()); in TEST_F() 1086 ASSERT_NE(tmp1.GetReg(), target.GetLinkReg()); in TEST_F()
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/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch32/ |
H A D | encode.cpp | 1141 vixl::aarch32::SRegister tmp1(tmp.GetReg().GetId() + 1); in EncodeCmpFracWithDelta() 1149 vixl::aarch32::DRegister tmp1(tmp.GetReg().GetId() + 1); in EncodeCmpFracWithDelta() 1196 vixl::aarch32::SRegister tmp2(tmp1.GetReg().GetId() + 1); in EncodeIsSafeInteger() 1202 vixl::aarch32::DRegister tmp2(tmp1.GetReg().GetId() + 1); in EncodeIsSafeInteger() 1297 vixl::aarch32::SRegister temp1(temp.GetReg().GetId()); in EncodeRoundToPInf() 1298 vixl::aarch32::SRegister temp2(temp.GetReg().GetId() + 1); in EncodeRoundToPInf() 2245 GetMasm()->Vmov(vixl::aarch32::SRegister(tmpReg.GetReg().GetId() + (src0.GetId() & 1U)), VixlVReg(src1).S()); in EncodeVorr() 2246 GetMasm()->Vorr(vixl::aarch32::DRegister(tmpReg.GetReg().GetId() / 2U), in EncodeVorr() 2248 vixl::aarch32::DRegister(tmpReg.GetReg().GetId() / 2U)); in EncodeVorr() 2249 GetMasm()->Vmov(VixlVReg(dst).S(), vixl::aarch32::SRegister(tmpReg.GetReg() in EncodeVorr() [all...] |
/arkcompiler/runtime_core/static_core/compiler/tests/aarch64/ |
H A D | encoder64_test_2.cpp | 1371 ASSERT_EQ(tmp1.GetReg(), target.GetLinkReg()); in TEST_F() 1372 ASSERT_NE(tmp2.GetReg(), target.GetLinkReg()); in TEST_F() 1375 ASSERT_EQ(tmp3.GetReg(), target.GetLinkReg()); in TEST_F() 1379 ASSERT_NE(tmp1.GetReg(), target.GetLinkReg()); in TEST_F()
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/arkcompiler/runtime_core/compiler/optimizer/analysis/ |
H A D | liveness_analyzer.h | 246 Register GetReg() const in GetReg() function in panda::compiler::LifeIntervals
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