/arkcompiler/ets_runtime/ecmascript/compiler/ |
H A D | mcr_circuit_builder.h | 342 return LogicAndBuilder(env_).And(TaggedIsHeapObject(x)).And(TaggedIsHeapObject(y)) in BothAreString() 343 .And(TaggedObjectIsString(x)).And(TaggedObjectIsString(y)).Done(); in BothAreString() 399 return LogicAndBuilder(env_).And(TaggedIsHeapObject(x)).And(IsJsType(x, JSType::JS_ASYNC_GENERATOR_OBJECT)).Done(); in TaggedIsAsyncGeneratorObject() 404 return LogicAndBuilder(env_).And(TaggedIsHeapObject(x)).And(IsJsType(x, JSType::JS_GLOBAL_OBJECT)).Done(); in TaggedIsJSGlobalObject() 409 return LogicAndBuilder(env_).And(TaggedIsHeapObject(x)).And(IsJsTyp in TaggedIsGeneratorObject() [all...] |
H A D | builtins_lowering.cpp | 330 .And(builder_.TaggedIsHeapObjectOp(obj)) in LowerCallTargetCheckWithDetector() 331 .And(builder_.IsSpecificObjectType(obj, expectType)) in LowerCallTargetCheckWithDetector() 332 .And(builder_.IsMarkerCellValid(builder_.GetGlobalEnvObj(builder_.GetGlobalEnv(), detectorIndex))) in LowerCallTargetCheckWithDetector() 365 .And(builder_.TaggedIsHeapObjectOp(obj)) in LowerCallTargetCheckWithObjectType() 366 .And(builder_.IsSpecificObjectType(obj, expectType)) in LowerCallTargetCheckWithObjectType() 367 .And(LowerCallTargetCheckDefault(gate, id)) in LowerCallTargetCheckWithObjectType()
|
H A D | common_stub_csigns.h | 39 V(And) \
|
H A D | lcr_opcodes.h | 32 V(And, AND, GateFlags::NONE_FLAG, 0, 0, 2) \
|
H A D | operations_stub_builder.h | 53 GateRef And(GateRef glue, GateRef left, GateRef right, ProfileOperation callback = ProfileOperation());
|
H A D | hcr_circuit_builder.cpp | 745 return LogicAndBuilder(env_).And(isValidOpt).And(IsLiteralString(leftString)) in CanBeConcat() 746 .And(IsLiteralString(rightString)).Done(); in CanBeConcat() 752 return LogicAndBuilder(env_).And(isValidOpt).And(IsLiteralString(rightString)).Done(); in CanBackStore()
|
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/src/cg/x86_64/ |
H A D | x64_emitter.cpp | 525 assmbler.And(kB, TransferReg(opnd0), TransferReg(opnd1)); in EmitInsn() 528 assmbler.And(kW, TransferReg(opnd0), TransferReg(opnd1)); in EmitInsn() 531 assmbler.And(kL, TransferReg(opnd0), TransferReg(opnd1)); in EmitInsn() 534 assmbler.And(kQ, TransferReg(opnd0), TransferReg(opnd1)); in EmitInsn() 537 assmbler.And(kB, TransferImm(opnd0), TransferReg(opnd1)); in EmitInsn() 540 assmbler.And(kW, TransferImm(opnd0), TransferReg(opnd1)); in EmitInsn() 543 assmbler.And(kL, TransferImm(opnd0), TransferReg(opnd1)); in EmitInsn() 546 assmbler.And(kQ, TransferImm(opnd0), TransferReg(opnd1)); in EmitInsn() 549 assmbler.And(kB, TransferMem(opnd0, funcUniqueId), TransferReg(opnd1)); in EmitInsn() 552 assmbler.And(k in EmitInsn() [all...] |
/arkcompiler/runtime_core/static_core/bytecode_optimizer/tests/ |
H A D | bc_lowering_test.cpp | 247 INST(6U, Opcode::And).u32().Inputs(0U, 1U); in TEST_F() 248 INST(8U, Opcode::And).u32().Inputs(0U, 2U); in TEST_F() 252 INST(13U, Opcode::And).u32().Inputs(0U, 0U); in TEST_F() 253 INST(26U, Opcode::And).s64().Inputs(24U, 25U); in TEST_F() 257 INST(31U, Opcode::And).u32().Inputs(0U, 27U); in TEST_F() 290 INST(13U, Opcode::And).u32().Inputs(0U, 0U); in TEST_F() 291 INST(26U, Opcode::And).s64().Inputs(24U, 25U); in TEST_F()
|
H A D | bitops_bitwise_and_test.cpp | 101 INST(10U, Opcode::And).s64().Inputs(9U, 4U); in TEST_F()
|
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/include/cg/x86_64/assembler/ |
H A D | asm_assembler.h | 208 void And(InsnSize insnSize, Reg srcReg, Reg destReg) override; 209 void And(InsnSize insnSize, const Mem &mem, Reg reg) override; 210 void And(InsnSize insnSize, const ImmOpnd &immOpnd, Reg reg) override; 211 void And(InsnSize insnSize, Reg reg, const Mem &mem) override; 212 void And(InsnSize insnSize, const ImmOpnd &immOpnd, const Mem &mem) override; 348 void And(Reg srcReg, Reg destReg, bool isSingle) override; 349 void And(const Mem &mem, Reg reg, bool isSingle) override;
|
H A D | assembler.h | 221 virtual void And(InsnSize insnSize, Reg srcReg, Reg destReg) = 0; 222 virtual void And(InsnSize insnSize, const Mem &mem, Reg reg) = 0; 223 virtual void And(InsnSize insnSize, const ImmOpnd &immOpnd, Reg reg) = 0; 224 virtual void And(InsnSize insnSize, Reg reg, const Mem &mem) = 0; 225 virtual void And(InsnSize insnSize, const ImmOpnd &immOpnd, const Mem &mem) = 0; 361 virtual void And(Reg srcReg, Reg destReg, bool isSingle = true) = 0; 362 virtual void And(const Mem &mem, Reg reg, bool isSingle = true) = 0;
|
H A D | elf_assembler.h | 199 void And(InsnSize insnSize, Reg srcReg, Reg destReg) override; 200 void And(InsnSize insnSize, const Mem &mem, Reg reg) override; 201 void And(InsnSize insnSize, const ImmOpnd &immOpnd, Reg reg) override; 202 void And(InsnSize insnSize, Reg reg, const Mem &mem) override; 203 void And(InsnSize insnSize, const ImmOpnd &immOpnd, const Mem &mem) override; 339 void And(Reg srcReg, Reg destReg, bool isSingle) override; 340 void And(const Mem &mem, Reg reg, bool isSingle) override;
|
/arkcompiler/runtime_core/static_core/compiler/optimizer/optimizations/ |
H A D | cse.h | 187 case Opcode::And: in IsLegalExp() 203 case Opcode::And: in IsCommutative()
|
H A D | lowering.cpp | 137 VisitBitwiseBinaryOperation<Opcode::And>(v, inst); in VisitAnd() 432 // 8. And v6, v7 in ReplaceSignedModPowerOfTwo() 620 case Opcode::And: in GetInstructionWithShiftedOperand() 642 case Opcode::And: in GetInstructionWithInvertedOperand() 915 BinaryOp<Opcode::And, SRC0, UnaryOp<Opcode::Not, SRC1, Flags::S>, Flags::C>, in LowerLogicWithInvertedOperand() 930 } else if (opcode == Opcode::And) { in LowerLogicWithInvertedOperand() 1039 ASSERT(opc == Opcode::Or || opc == Opcode::And || opc == Opcode::Xor); in LowerLogic() 1055 } else if (opc == Opcode::And) { in LowerLogic() 1255 // And change CC in OptimizeIfInput() 1296 if (input->GetOpcode() != Opcode::Compare && input->GetOpcode() != Opcode::And) { in LowerIf() [all...] |
/arkcompiler/ets_runtime/ecmascript/builtins/ |
H A D | builtins_atomics.h | 33 V("and", And, 3, INVALID) \
63 static JSTaggedValue And(EcmaRuntimeCallInfo *argv);
|
/arkcompiler/runtime_core/bytecode_optimizer/tests/ |
H A D | bitops_bitwise_and_test.cpp | 97 INST(10, Opcode::And).s64().Inputs(9, 4); in TEST_F()
|
/arkcompiler/ets_runtime/ecmascript/compiler/trampoline/aarch64/ |
H A D | asm_interpreter_call.cpp | 86 __ And(functionTypeRegister, bitFieldRegister.W(), LogicalImmediate::Create(0xFF, RegWSize)); in AsmInterpEntryDispatch() 763 __ And(temp, temp, ret); in ResumeRspAndDispatch() 769 __ And(temp.W(), temp.W(), LogicalImmediate::Create(0xFF, RegWSize)); in ResumeRspAndDispatch() 789 __ And(temp.W(), temp.W(), in ResumeRspAndDispatch() 879 __ And(temp, temp, ret); 885 __ And(temp.W(), temp.W(), LogicalImmediate::Create(0xFF, RegWSize)); 902 __ And(temp.W(), temp.W(), 1238 __ And(X15, X3, LogicalImmediate::Create(~(JSTaggedValue::TAG_MARK | DEFAULT_REGION_MASK), RegXSize)); 1262 __ And(X15, X1, LogicalImmediate::Create(~(JSTaggedValue::TAG_MARK | DEFAULT_REGION_MASK), RegXSize)); 1350 __ And(X1 [all...] |
/arkcompiler/runtime_core/static_core/compiler/tests/ |
H A D | graph_creation_test.cpp | 59 INST(9U, Opcode::And).u64().Inputs(4U, 5U); in TEST_F()
|
H A D | cse_test.cpp | 71 INST(20U, Opcode::And).b().Inputs(0U, 1U); in SRC_GRAPH() 81 INST(29U, Opcode::And).b().Inputs(0U, 1U); in SRC_GRAPH() 118 INST(20U, Opcode::And).b().Inputs(0U, 1U); in OUT_GRAPH() 382 INST(12U, Opcode::And).b().Inputs(0U, 1U); in SRC_GRAPH() 388 INST(17U, Opcode::And).b().Inputs(1U, 0U); in SRC_GRAPH() 418 INST(12U, Opcode::And).b().Inputs(0U, 1U); in OUT_GRAPH() 460 INST(9U, Opcode::And).b().Inputs(0U, 1U); in SRC_GRAPH() 481 INST(18U, Opcode::And).b().Inputs(1U, 0U); in SRC_GRAPH() 504 INST(9U, Opcode::And).b().Inputs(0U, 1U); in OUT_GRAPH()
|
/arkcompiler/runtime_core/static_core/platforms/windows/libpandabase/ |
H A D | cpu_affinity.cpp | 87 void CpuSet::And(CpuSet &result, const CpuSet &lhs, const CpuSet &rhs) in And() function in ark::os::CpuSet
|
/arkcompiler/runtime_core/static_core/libpandabase/os/ |
H A D | cpu_affinity.h | 79 static void And(CpuSet &result, const CpuSet &lhs, const CpuSet &rhs);
|
/arkcompiler/ets_frontend/ets2panda/checker/ets/ |
H A D | aliveAnalyzer.h | 52 LivenessStatus And(LivenessStatus left, LivenessStatus right) in And() function in ark::es2panda::ark::es2panda::checker::AliveAnalyzer
|
/arkcompiler/ets_runtime/ecmascript/compiler/builtins/ |
H A D | builtins_object_stub_builder.cpp | 229 GateRef protoCheck = LogicAndBuilder(env).And(BoolNot(IsEcmaObject(proto)))
in Create() 230 .And(BoolNot(TaggedIsNull(proto))).Done();
in Create() 921 BRANCH(LogicAndBuilder(env).And(TaggedIsString(key)).And(IsEnumerable(GetAttr(layoutInfo, iVal))).Done(),
in LayoutInfoGetAllEnumKeys() 1211 .And(IsJSObject(obj))
in IsNotSlowObjectKey() 1212 .And(BoolNot(LogicOrBuilder(env).Or(IsTypedArray(obj)).Or(IsModuleNamespace(obj))
in IsNotSlowObjectKey() 1350 .And(TaggedIsHeapObject(obj)).And(TaggedIsHeapObject(protoVal))
in SetPrototypeOf() 1351 .And(IsJSFunction(obj)).And(IsJSFunctio in SetPrototypeOf() [all...] |
H A D | builtins_array_stub_builder.cpp | 227 .And(Int32GreaterThanOrEqual(kind, Int32(static_cast<int32_t>(ElementsKind::INT)))) in Unshift() 228 .And(Int32LessThanOrEqual(kind, Int32(static_cast<int32_t>(ElementsKind::HOLE_INT)))) in Unshift() 231 .And(Int32GreaterThanOrEqual(kind, Int32(static_cast<int32_t>(ElementsKind::NUMBER)))) in Unshift() 232 .And(Int32LessThanOrEqual(kind, Int32(static_cast<int32_t>(ElementsKind::HOLE_NUMBER)))) in Unshift() 421 GateRef isAllStableJsArray = LogicAndBuilder(env).And(IsStableJSArray(glue, thisValue)) in Concat() 422 .And(IsStableJSArray(glue, arg0)).Done(); in Concat() 445 GateRef isAllConcatSpreadable = LogicAndBuilder(env).And(IsConcatSpreadable(glue, thisValue)) in Concat() 446 .And(IsConcatSpreadable(glue, arg0)).Done(); in Concat() 543 GateRef thisValueAndProtoIsJSArray = LogicAndBuilder(env).And(IsJsArray(thisValue)) in Filter() 544 .And(IsJsArra in Filter() [all...] |
/arkcompiler/ets_runtime/ecmascript/compiler/assembler/aarch64/ |
H A D | assembler_aarch64.h | 317 void And(const Register &rd, const Register &rn, const Operand &operand); 319 void And(const Register &rd, const Register &rn, const LogicalImmediate &imm);
|