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Searched defs:xcc_id (Results 1 - 22 of 22) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_umr.h46 u32 xcc_id; member
50 u32 gpr_or_wave, se, sh, cu, wave, simd, xcc_id; member
H A Damdgpu_rlc.c38 void amdgpu_gfx_rlc_enter_safe_mode(struct amdgpu_device *adev, int xcc_id) in amdgpu_gfx_rlc_enter_safe_mode() argument
63 void amdgpu_gfx_rlc_exit_safe_mode(struct amdgpu_device *adev, int xcc_id) in amdgpu_gfx_rlc_exit_safe_mode() argument
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H A Daqua_vanjaram.c549 int r, i, xcc_id; in aqua_vanjaram_get_xcp_mem_id() local
533 __aqua_vanjaram_get_xcp_mem_id(struct amdgpu_device *adev, int xcc_id, uint8_t *mem_id) __aqua_vanjaram_get_xcp_mem_id() argument
H A Damdgpu_gfx.c66 amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device *adev, int xcc_id, int mec, int pipe, int queue) amdgpu_gfx_is_mec_queue_enabled() argument
271 amdgpu_gfx_kiq_acquire(struct amdgpu_device *adev, struct amdgpu_ring *ring, int xcc_id) amdgpu_gfx_kiq_acquire() argument
306 amdgpu_gfx_kiq_init_ring(struct amdgpu_device *adev, struct amdgpu_ring *ring, struct amdgpu_irq_src *irq, int xcc_id) amdgpu_gfx_kiq_init_ring() argument
345 amdgpu_gfx_kiq_fini(struct amdgpu_device *adev, int xcc_id) amdgpu_gfx_kiq_fini() argument
352 amdgpu_gfx_kiq_init(struct amdgpu_device *adev, unsigned int hpd_size, int xcc_id) amdgpu_gfx_kiq_init() argument
379 amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev, unsigned int mqd_size, int xcc_id) amdgpu_gfx_mqd_sw_init() argument
470 amdgpu_gfx_mqd_sw_fini(struct amdgpu_device *adev, int xcc_id) amdgpu_gfx_mqd_sw_fini() argument
502 amdgpu_gfx_disable_kcq(struct amdgpu_device *adev, int xcc_id) amdgpu_gfx_disable_kcq() argument
533 amdgpu_gfx_disable_kgq(struct amdgpu_device *adev, int xcc_id) amdgpu_gfx_disable_kgq() argument
579 amdgpu_gfx_enable_kcq(struct amdgpu_device *adev, int xcc_id) amdgpu_gfx_enable_kcq() argument
636 amdgpu_gfx_enable_kgq(struct amdgpu_device *adev, int xcc_id) amdgpu_gfx_enable_kgq() argument
901 amdgpu_gfx_ras_error_func(struct amdgpu_device *adev, void *ras_error_status, void (*func)(struct amdgpu_device *adev, void *ras_error_status, int xcc_id)) amdgpu_gfx_ras_error_func() argument
1198 amdgpu_gfx_is_master_xcc(struct amdgpu_device *adev, int xcc_id) amdgpu_gfx_is_master_xcc() argument
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H A Damdgpu_virt.c978 static u32 amdgpu_virt_rlcg_reg_rw(struct amdgpu_device *adev, u32 offset, u32 v, u32 flag, u32 xcc_id) in amdgpu_virt_rlcg_reg_rw() argument
1064 amdgpu_sriov_wreg(struct amdgpu_device *adev, u32 offset, u32 value, u32 acc_flags, u32 hwip, u32 xcc_id) amdgpu_sriov_wreg() argument
1082 amdgpu_sriov_rreg(struct amdgpu_device *adev, u32 offset, u32 acc_flags, u32 hwip, u32 xcc_id) amdgpu_sriov_rreg() argument
H A Damdgpu_acpi.c1155 int amdgpu_acpi_get_mem_info(struct amdgpu_device *adev, int xcc_id, in amdgpu_acpi_get_mem_info() argument
H A Dsoc15.c339 soc15_grbm_select(struct amdgpu_device *adev, u32 me, u32 pipe, u32 queue, u32 vmid, int xcc_id) soc15_grbm_select() argument
H A Dgmc_v9_0.c559 int ret, xcc_id = 0; in gmc_v9_0_process_interrupt() local
1885 int num_xcc, xcc_id; in gmc_v9_0_init_acpi_mem_ranges() local
H A Damdgpu_ring.h258 u32 xcc_id; member
H A Dgfx_v6_0.c2971 static void gfx_v6_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v6_0_read_wave_data() argument
2996 static void gfx_v6_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v6_0_read_wave_sgprs() argument
1287 gfx_v6_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance, int xcc_id) gfx_v6_0_select_se_sh() argument
3005 gfx_v6_0_select_me_pipe_q(struct amdgpu_device *adev, u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id) gfx_v6_0_select_me_pipe_q() argument
H A Damdgpu_device.c514 amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev, uint32_t reg, uint32_t v, uint32_t xcc_id) amdgpu_mm_wreg_mmio_rlc() argument
H A Dgfx_v7_0.c3362 static void gfx_v7_0_set_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v7_0_set_safe_mode() argument
3384 static void gfx_v7_0_unset_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v7_0_unset_safe_mode() argument
4112 static void gfx_v7_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v7_0_read_wave_data() argument
4137 static void gfx_v7_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v7_0_read_wave_sgprs() argument
1552 gfx_v7_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance, int xcc_id) gfx_v7_0_select_se_sh() argument
4146 gfx_v7_0_select_me_pipe_q(struct amdgpu_device *adev, u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id) gfx_v7_0_select_me_pipe_q() argument
H A Dgfx_v8_0.c5218 static void gfx_v8_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v8_0_read_wave_data() argument
5243 static void gfx_v8_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v8_0_read_wave_sgprs() argument
5538 static void gfx_v8_0_set_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v8_0_set_safe_mode() argument
5565 static void gfx_v8_0_unset_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v8_0_unset_safe_mode() argument
3397 gfx_v8_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance, int xcc_id) gfx_v8_0_select_se_sh() argument
3421 gfx_v8_0_select_me_pipe_q(struct amdgpu_device *adev, u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id) gfx_v8_0_select_me_pipe_q() argument
H A Dgfx_v11_0.c780 static void gfx_v11_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v11_0_read_wave_data() argument
806 static void gfx_v11_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v11_0_read_wave_sgprs() argument
817 static void gfx_v11_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v11_0_read_wave_vgprs() argument
4690 static void gfx_v11_0_set_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v11_0_set_safe_mode() argument
4709 static void gfx_v11_0_unset_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v11_0_unset_safe_mode() argument
827 gfx_v11_0_select_me_pipe_q(struct amdgpu_device *adev, u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id) gfx_v11_0_select_me_pipe_q() argument
1531 gfx_v11_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance, int xcc_id) gfx_v11_0_select_se_sh() argument
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H A Dgfx_v9_4_3.c550 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t address) in wave_read_ind() argument
560 static void wave_read_regs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in wave_read_regs() argument
523 gfx_v9_4_3_xcc_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance, int xcc_id) gfx_v9_4_3_xcc_select_se_sh() argument
575 gfx_v9_4_3_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) gfx_v9_4_3_read_wave_data() argument
598 gfx_v9_4_3_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t start, uint32_t size, uint32_t *dst) gfx_v9_4_3_read_wave_sgprs() argument
606 gfx_v9_4_3_read_wave_vgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t thread, uint32_t start, uint32_t size, uint32_t *dst) gfx_v9_4_3_read_wave_vgprs() argument
615 gfx_v9_4_3_select_me_pipe_q(struct amdgpu_device *adev, u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id) gfx_v9_4_3_select_me_pipe_q() argument
739 gfx_v9_4_3_compute_ring_init(struct amdgpu_device *adev, int ring_id, int xcc_id, int mec, int pipe, int queue) gfx_v9_4_3_compute_ring_init() argument
780 int i, j, k, r, ring_id, xcc_id, num_xcc; gfx_v9_4_3_sw_init() local
902 gfx_v9_4_3_xcc_init_compute_vmid(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_init_compute_vmid() argument
947 gfx_v9_4_3_xcc_init_gds_vmid(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_init_gds_vmid() argument
965 gfx_v9_4_3_xcc_constants_init(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_constants_init() argument
1026 gfx_v9_4_3_xcc_enable_save_restore_machine(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_enable_save_restore_machine() argument
1032 gfx_v9_4_3_xcc_init_pg(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_init_pg() argument
1042 gfx_v9_4_3_xcc_disable_gpa_mode(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_disable_gpa_mode() argument
1063 gfx_v9_4_3_xcc_set_safe_mode(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_set_safe_mode() argument
1080 gfx_v9_4_3_xcc_unset_safe_mode(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_unset_safe_mode() argument
1091 int xcc_id, num_xcc; gfx_v9_4_3_init_rlcg_reg_access_ctrl() local
1116 gfx_v9_4_3_xcc_wait_for_rlc_serdes(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_wait_for_rlc_serdes() argument
1158 gfx_v9_4_3_xcc_enable_gui_idle_interrupt(struct amdgpu_device *adev, bool enable, int xcc_id) gfx_v9_4_3_xcc_enable_gui_idle_interrupt() argument
1174 gfx_v9_4_3_xcc_rlc_stop(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_rlc_stop() argument
1191 gfx_v9_4_3_xcc_rlc_reset(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_rlc_reset() argument
1210 gfx_v9_4_3_xcc_rlc_start(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_rlc_start() argument
1252 gfx_v9_4_3_xcc_rlc_load_microcode(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_rlc_load_microcode() argument
1283 gfx_v9_4_3_xcc_rlc_resume(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_rlc_resume() argument
1381 gfx_v9_4_3_xcc_cp_compute_enable(struct amdgpu_device *adev, bool enable, int xcc_id) gfx_v9_4_3_xcc_cp_compute_enable() argument
1394 gfx_v9_4_3_xcc_cp_compute_load_microcode(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_cp_compute_load_microcode() argument
1443 gfx_v9_4_3_xcc_kiq_setting(struct amdgpu_ring *ring, int xcc_id) gfx_v9_4_3_xcc_kiq_setting() argument
1470 gfx_v9_4_3_xcc_mqd_init(struct amdgpu_ring *ring, int xcc_id) gfx_v9_4_3_xcc_mqd_init() argument
1598 gfx_v9_4_3_xcc_kiq_init_register(struct amdgpu_ring *ring, int xcc_id) gfx_v9_4_3_xcc_kiq_init_register() argument
1712 gfx_v9_4_3_xcc_q_fini_register(struct amdgpu_ring *ring, int xcc_id) gfx_v9_4_3_xcc_q_fini_register() argument
1752 gfx_v9_4_3_xcc_kiq_init_queue(struct amdgpu_ring *ring, int xcc_id) gfx_v9_4_3_xcc_kiq_init_queue() argument
1799 gfx_v9_4_3_xcc_kcq_init_queue(struct amdgpu_ring *ring, int xcc_id) gfx_v9_4_3_xcc_kcq_init_queue() argument
1837 gfx_v9_4_3_xcc_kcq_fini_register(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_kcq_fini_register() argument
1858 gfx_v9_4_3_xcc_kiq_resume(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_kiq_resume() argument
1882 gfx_v9_4_3_xcc_kcq_resume(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_kcq_resume() argument
1911 gfx_v9_4_3_xcc_cp_resume(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_cp_resume() argument
1970 gfx_v9_4_3_xcc_cp_enable(struct amdgpu_device *adev, bool enable, int xcc_id) gfx_v9_4_3_xcc_cp_enable() argument
1976 gfx_v9_4_3_xcc_fini(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_xcc_fini() argument
2210 gfx_v9_4_3_xcc_update_sram_fgcg(struct amdgpu_device *adev, bool enable, int xcc_id) gfx_v9_4_3_xcc_update_sram_fgcg() argument
2232 gfx_v9_4_3_xcc_update_repeater_fgcg(struct amdgpu_device *adev, bool enable, int xcc_id) gfx_v9_4_3_xcc_update_repeater_fgcg() argument
2254 gfx_v9_4_3_xcc_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable, int xcc_id) gfx_v9_4_3_xcc_update_medium_grain_clock_gating() argument
2319 gfx_v9_4_3_xcc_update_coarse_grain_clock_gating(struct amdgpu_device *adev, bool enable, int xcc_id) gfx_v9_4_3_xcc_update_coarse_grain_clock_gating() argument
2366 gfx_v9_4_3_xcc_update_gfx_clock_gating(struct amdgpu_device *adev, bool enable, int xcc_id) gfx_v9_4_3_xcc_update_gfx_clock_gating() argument
2704 gfx_v9_4_3_xcc_set_compute_eop_interrupt_state( struct amdgpu_device *adev, int me, int pipe, enum amdgpu_interrupt_state state, int xcc_id) gfx_v9_4_3_xcc_set_compute_eop_interrupt_state() argument
2857 int i, xcc_id; gfx_v9_4_3_eop_irq() local
2896 int i, xcc_id; gfx_v9_4_3_fault() local
3762 gfx_v9_4_3_inst_query_ras_err_count(struct amdgpu_device *adev, void *ras_error_status, int xcc_id) gfx_v9_4_3_inst_query_ras_err_count() argument
3811 gfx_v9_4_3_inst_reset_ras_err_count(struct amdgpu_device *adev, void *ras_error_status, int xcc_id) gfx_v9_4_3_inst_reset_ras_err_count() argument
3844 gfx_v9_4_3_inst_query_ea_err_status(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_inst_query_ea_err_status() argument
3877 gfx_v9_4_3_inst_query_utc_err_status(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_inst_query_utc_err_status() argument
3903 gfx_v9_4_3_log_cu_timeout_status(struct amdgpu_device *adev, uint32_t status, int xcc_id) gfx_v9_4_3_log_cu_timeout_status() argument
3945 gfx_v9_4_3_inst_query_sq_timeout_status(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_inst_query_sq_timeout_status() argument
3978 gfx_v9_4_3_inst_query_ras_err_status(struct amdgpu_device *adev, void *ras_error_status, int xcc_id) gfx_v9_4_3_inst_query_ras_err_status() argument
3986 gfx_v9_4_3_inst_reset_utc_err_status(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_inst_reset_utc_err_status() argument
3994 gfx_v9_4_3_inst_reset_ea_err_status(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_inst_reset_ea_err_status() argument
4015 gfx_v9_4_3_inst_reset_sq_timeout_status(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_inst_reset_sq_timeout_status() argument
4036 gfx_v9_4_3_inst_reset_ras_err_status(struct amdgpu_device *adev, void *ras_error_status, int xcc_id) gfx_v9_4_3_inst_reset_ras_err_status() argument
4044 gfx_v9_4_3_inst_enable_watchdog_timer(struct amdgpu_device *adev, void *ras_error_status, int xcc_id) gfx_v9_4_3_inst_enable_watchdog_timer() argument
4261 gfx_v9_4_3_set_user_cu_inactive_bitmap(struct amdgpu_device *adev, u32 bitmap, int xcc_id) gfx_v9_4_3_set_user_cu_inactive_bitmap() argument
4275 gfx_v9_4_3_get_cu_active_bitmap(struct amdgpu_device *adev, int xcc_id) gfx_v9_4_3_get_cu_active_bitmap() argument
4293 int i, j, k, counter, xcc_id, active_cu_number = 0; gfx_v9_4_3_get_cu_info() local
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H A Damdgpu.h1440 amdgpu_acpi_get_mem_info(struct amdgpu_device *adev, int xcc_id, struct amdgpu_numa_info *numa_info) amdgpu_acpi_get_mem_info() argument
H A Dgfx_v9_0.c1767 static void gfx_v9_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v9_0_read_wave_data() argument
1788 static void gfx_v9_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v9_0_read_wave_sgprs() argument
1797 static void gfx_v9_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v9_0_read_wave_vgprs() argument
4613 static void gfx_v9_0_set_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v9_0_set_safe_mode() argument
4630 static void gfx_v9_0_unset_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v9_0_unset_safe_mode() argument
1807 gfx_v9_0_select_me_pipe_q(struct amdgpu_device *adev, u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id) gfx_v9_0_select_me_pipe_q() argument
2219 gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance, int xcc_id) gfx_v9_0_select_se_sh() argument
H A Dgfx_v10_0.c4270 static void gfx_v10_0_read_wave_data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int *no_fields) in gfx_v10_0_read_wave_data() argument
4298 static void gfx_v10_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v10_0_read_wave_sgprs() argument
4309 static void gfx_v10_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, in gfx_v10_0_read_wave_vgprs() argument
7460 static void gfx_v10_0_set_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v10_0_set_safe_mode() argument
7501 static void gfx_v10_0_unset_safe_mode(struct amdgpu_device *adev, int xcc_id) in gfx_v10_0_unset_safe_mode() argument
4319 gfx_v10_0_select_me_pipe_q(struct amdgpu_device *adev, u32 me, u32 pipe, u32 q, u32 vm, u32 xcc_id) gfx_v10_0_select_me_pipe_q() argument
4691 gfx_v10_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance, int xcc_id) gfx_v10_0_select_se_sh() argument
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_mqd_manager_v9.c555 int xcc_id, err, inst = 0; in hiq_load_mqd_kiq_v9_4_3() local
579 int xcc_id, err, inst = 0; in destroy_hiq_mqd_v9_4_3() local
716 int xcc_id, err, inst = 0; in destroy_mqd_v9_4_3() local
746 int xcc_id, er in load_mqd_v9_4_3() local
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H A Dkfd_debug.c447 int xcc_id, r = kfd_dbg_get_dev_watch_id(pdd, watch_id); in kfd_dbg_trap_set_dev_address_watch() local
H A Dkfd_device_queue_manager.c144 int xcc_id; in program_sh_mem_settings() local
434 int xcc_id; in program_trap_handler_settings() local
704 int xcc_id; in dbgdev_wave_reset_wavefronts() local
1365 int xcc_id, re in set_pasid_vmid_mapping() local
1380 unsigned int i, xcc_id; init_interrupts() local
3161 int r = 0, xcc_id; dqm_debugfs_hqds() local
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_6_ppt.c683 int xcc_id; in smu_v13_0_6_get_smu_metrics_data() local

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