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Searched defs:waddr (Results 1 - 12 of 12) sorted by relevance

/third_party/mesa3d/src/broadcom/compiler/
H A Dqpu_validate.c90 qpu_magic_waddr_matches(const struct v3d_qpu_instr *inst, bool (*predicate)(enum v3d_qpu_waddr waddr)) qpu_magic_waddr_matches() argument
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H A Dvir_to_qpu.c39 qpu_magic(enum v3d_qpu_waddr waddr) in qpu_magic() argument
145 enum v3d_qpu_waddr waddr = qinst->qpu.alu.mul.waddr; in is_no_op_mov() local
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H A Dv3d40_tex.c34 vir_TMU_WRITE(struct v3d_compile *c, enum v3d_qpu_waddr waddr, struct qreg val) in vir_TMU_WRITE() argument
43 vir_TMU_WRITE_or_count(struct v3d_compile *c, enum v3d_qpu_waddr waddr, struct qreg val, uint32_t *tmu_writes) vir_TMU_WRITE_or_count() argument
H A Dqpu_schedule.c173 tmu_write_is_sequence_terminator(uint32_t waddr) in tmu_write_is_sequence_terminator() argument
189 can_reorder_tmu_write(const struct v3d_device_info *devinfo, uint32_t waddr) in can_reorder_tmu_write() argument
204 process_waddr_deps(struct schedule_state *state, struct schedule_node *n, uint32_t waddr, bool magic) process_waddr_deps() argument
603 qpu_instruction_uses_rf(const struct v3d_qpu_instr *inst, uint32_t waddr) qpu_instruction_uses_rf() argument
1277 update_scoreboard_for_magic_waddr(struct choose_scoreboard *scoreboard, enum v3d_qpu_waddr waddr, const struct v3d_device_info *devinfo) update_scoreboard_for_magic_waddr() argument
1356 magic_waddr_latency(const struct v3d_device_info *devinfo, enum v3d_qpu_waddr waddr, const struct v3d_qpu_instr *after) magic_waddr_latency() argument
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/third_party/mesa3d/src/broadcom/qpu/
H A Dqpu_disasm.c86 v3d_qpu_disasm_waddr(struct disasm_state *disasm, uint32_t waddr, bool magic) in v3d_qpu_disasm_waddr() argument
H A Dqpu_instr.c530 v3d_qpu_magic_waddr_is_sfu(enum v3d_qpu_waddr waddr) in v3d_qpu_magic_waddr_is_sfu() argument
31 v3d_qpu_magic_waddr_name(const struct v3d_device_info *devinfo, enum v3d_qpu_waddr waddr) v3d_qpu_magic_waddr_name() argument
546 v3d_qpu_magic_waddr_is_tmu(const struct v3d_device_info *devinfo, enum v3d_qpu_waddr waddr) v3d_qpu_magic_waddr_is_tmu() argument
571 v3d_qpu_magic_waddr_is_tlb(enum v3d_qpu_waddr waddr) v3d_qpu_magic_waddr_is_tlb() argument
578 v3d_qpu_magic_waddr_is_vpm(enum v3d_qpu_waddr waddr) v3d_qpu_magic_waddr_is_vpm() argument
585 v3d_qpu_magic_waddr_is_tsy(enum v3d_qpu_waddr waddr) v3d_qpu_magic_waddr_is_tsy() argument
593 v3d_qpu_magic_waddr_loads_unif(enum v3d_qpu_waddr waddr) v3d_qpu_magic_waddr_loads_unif() argument
803 qpu_writes_magic_waddr_explicitly(const struct v3d_device_info *devinfo, const struct v3d_qpu_instr *inst, uint32_t waddr) qpu_writes_magic_waddr_explicitly() argument
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H A Dqpu_pack.c746 uint32_t waddr = QPU_GET_FIELD(packed_inst, V3D_QPU_WADDR_A); in v3d_qpu_add_unpack() local
991 uint32_t waddr = instr->alu.add.waddr; in v3d_qpu_add_pack() local
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H A Dqpu_instr.h296 uint8_t waddr; member
306 uint8_t waddr; member
/third_party/mesa3d/src/gallium/drivers/vc4/
H A Dvc4_qpu_disasm.c299 uint32_t waddr = (is_mul ? in print_alu_dst() local
H A Dvc4_qpu.c319 qpu_waddr_ignores_ws(uint32_t waddr) in qpu_waddr_ignores_ws() argument
657 qpu_waddr_is_tlb(uint32_t waddr) in qpu_waddr_is_tlb() argument
H A Dvc4_qpu_schedule.c186 is_tmu_write(uint32_t waddr) in is_tmu_write() argument
226 process_waddr_deps(struct schedule_state *state, struct schedule_node *n, uint32_t waddr, bool is_add) process_waddr_deps() argument
708 waddr_latency(uint32_t waddr, uint64_t after) waddr_latency() argument
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/third_party/mesa3d/src/gallium/drivers/vc4/kernel/
H A Dvc4_validate_shaders.c98 waddr_to_live_reg_index(uint32_t waddr, bool is_b) in waddr_to_live_reg_index() argument
137 is_tmu_submit(uint32_t waddr) in is_tmu_submit() argument
144 is_tmu_write(uint32_t waddr) in is_tmu_write() argument
184 uint32_t waddr = (is_mul ? check_tmu_write() local
381 uint32_t waddr = (is_mul ? check_reg_write() local
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