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/kernel/linux/linux-5.10/arch/mips/include/asm/mach-malta/
H A Dkernel-entry-init.h113 PTR_LA v0, 0x9fc00534 /* YAMON print */ variable
114 lw v0, (v0) variable
119 PTR_LA v0, 0x9fc00520 /* YAMON exit */ variable
120 lw v0, (v0) variable
/kernel/linux/linux-6.6/arch/mips/include/asm/mach-malta/
H A Dkernel-entry-init.h113 PTR_LA v0, 0x9fc00534 /* YAMON print */ variable
114 lw v0, (v0) variable
119 PTR_LA v0, 0x9fc00520 /* YAMON exit */ variable
120 lw v0, (v0) variable
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Ddf_v4_3.c32 uint32_t v0, v1, v28, v31; in df_v4_3_query_ras_poison_mode() local
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/include/nvif/
H A Dif0014.h11 } v0; member
H A Dif0010.h12 } v0; member
H A Dif0021.h14 } v0; member
H A Dif000e.h11 } v0; member
/kernel/linux/linux-5.10/arch/mips/include/asm/mach-cavium-octeon/
H A Dkernel-entry-init.h32 dins v0, $0, 0, 6 variable
33 ori v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE variable
34 dmtc0 v0, CP0_CVMMEMCTL_REG # Write the cavium mem control register variable
35 dmfc0 v0, CP0_CVMCTL_REG # Read the cavium control register variable
38 or v0, v0, 0x5001 variable
39 xor v0, v0, 0x1001 variable
43 and v0, v variable
44 ori v0, v0, (6 << 7) global() variable
64 or v0, v0, 0x2000 # Set IPREF bit. global() variable
73 dli v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE global() variable
74 dsll v0, 7 global() variable
75 beqz v0, 2f global() variable
76 1: dsubu v0, 8 global() variable
80 mfc0 v0, CP0_PRID_REG global() variable
81 bbit0 v0, 15, 1f global() variable
83 and t1, v0, 0xff00 global() variable
84 dli v0, 0x9500 global() variable
85 bge t1, v0, 1f # OCTEON III has no DCACHE_ERR_REG COP0 global() variable
86 dli v0, 0x27 global() variable
87 dmtc0 v0, CP0_DCACHE_ERR_REG global() variable
90 rdhwr v0, $0 global() variable
119 bne t1, v0, octeon_spin_wait_boot global() variable
[all...]
/kernel/linux/linux-5.10/include/uapi/linux/netfilter/
H A Dxt_string.h24 } v0; member
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Ddmanv17.c41 struct nv03_channel_dma_v0 v0; in nv17_fifo_dma_new() member
[all...]
H A Ddmanv50.c39 struct nv50_channel_dma_v0 v0; in nv50_fifo_dma_new() member
[all...]
H A Ddmanv10.c41 struct nv03_channel_dma_v0 v0; in nv10_fifo_dma_new() member
[all...]
H A Ddmag84.c39 struct g82_channel_dma_v0 v0; in g84_fifo_dma_new() member
[all...]
H A Dgpfifog84.c39 struct g82_channel_gpfifo_v0 v0; in g84_fifo_gpfifo_new() member
[all...]
H A Dgpfifonv50.c39 struct nv50_channel_gpfifo_v0 v0; in nv50_fifo_gpfifo_new() member
[all...]
H A Dgpfifotu102.c57 struct volta_channel_gpfifo_a_v0 v0; in tu102_fifo_gpfifo_new() member
[all...]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dcursnv50.c39 struct nv50_disp_cursor_v0 v0; in nv50_disp_curs_new_() member
H A Dhead.c47 struct nv04_disp_scanoutpos_v0 v0; in nvkm_head_mthd_scanoutpos() member
[all...]
H A Doimmnv50.c39 struct nv50_disp_overlay_v0 v0; in nv50_disp_oimm_new_() member
H A Dovlynv50.c40 struct nv50_disp_overlay_channel_dma_v0 v0; in nv50_disp_ovly_new_() member
/kernel/linux/linux-6.6/include/uapi/linux/netfilter/
H A Dxt_string.h24 } v0; member
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/netfilter/
H A Dxt_string.h37 } v0; member
/kernel/linux/patches/linux-6.6/prebuilts/usr/include/linux/netfilter/
H A Dxt_string.h37 } v0; member
/kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/netfilter/
H A Dxt_string.h24 } v0; member
/kernel/linux/linux-6.6/arch/mips/include/asm/mach-cavium-octeon/
H A Dkernel-entry-init.h32 dins v0, $0, 0, 6 variable
33 ori v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE variable
34 dmtc0 v0, CP0_CVMMEMCTL_REG # Write the cavium mem control register variable
35 dmfc0 v0, CP0_CVMCTL_REG # Read the cavium control register variable
38 or v0, v0, 0x5001 variable
39 xor v0, v0, 0x1001 variable
43 and v0, v variable
44 ori v0, v0, (6 << 7) global() variable
64 or v0, v0, 0x2000 # Set IPREF bit. global() variable
73 dli v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE global() variable
74 dsll v0, 7 global() variable
75 beqz v0, 2f global() variable
76 1: dsubu v0, 8 global() variable
80 mfc0 v0, CP0_PRID_REG global() variable
81 bbit0 v0, 15, 1f global() variable
83 and t1, v0, 0xff00 global() variable
84 dli v0, 0x9500 global() variable
85 bge t1, v0, 1f # OCTEON III has no DCACHE_ERR_REG COP0 global() variable
86 dli v0, 0x27 global() variable
87 dmtc0 v0, CP0_DCACHE_ERR_REG global() variable
90 rdhwr v0, $0 global() variable
119 bne t1, v0, octeon_spin_wait_boot global() variable
[all...]

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