| /third_party/mesa3d/src/amd/vulkan/ |
| H A D | radv_meta_dcc_retile.c | 195 unsigned swizzle_mode = image->planes[0].surface.u.gfx9.swizzle_mode; in radv_retile_dcc() local
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| H A D | radv_radeon_winsys.h | 156 unsigned swizzle_mode : 5; member
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| /third_party/mesa3d/src/gallium/drivers/crocus/ |
| H A D | crocus_bufmgr.h | 106 uint32_t swizzle_mode; member
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| H A D | crocus_bufmgr.c | 1207 crocus_bo_get_tiling(struct crocus_bo *bo, uint32_t *tiling_mode, uint32_t *swizzle_mode) crocus_bo_get_tiling() argument
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| /third_party/libdrm/intel/ |
| H A D | intel_bufmgr.c | 250 drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, uint32_t * swizzle_mode) drm_intel_bo_get_tiling() argument
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| H A D | intel_bufmgr_gem.c | 191 uint32_t swizzle_mode; member
1033 get_tiling_mode(drm_intel_bufmgr_gem *bufmgr_gem, uint32_t gem_handle, uint32_t *tiling_mode, uint32_t *swizzle_mode) get_tiling_mode() argument
2551 drm_intel_gem_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode, uint32_t * swizzle_mode) drm_intel_gem_bo_get_tiling() argument
[all...] |
| /third_party/mesa3d/src/amd/common/ |
| H A D | ac_surface_meta_address_test.c | 195 one_dcc_address_test(const char *name, const char *test, ADDR_HANDLE addrlib, const struct radeon_info *info, unsigned width, unsigned height, unsigned depth, unsigned samples, unsigned bpp, unsigned swizzle_mode, bool pipe_aligned, bool rb_aligned, unsigned mrt_index, unsigned start_x, unsigned start_y, unsigned start_z, unsigned start_sample) one_dcc_address_test() argument
420 one_htile_address_test(const char *name, const char *test, ADDR_HANDLE addrlib, const struct radeon_info *info, unsigned width, unsigned height, unsigned depth, unsigned bpp, unsigned swizzle_mode, unsigned start_x, unsigned start_y, unsigned start_z) one_htile_address_test() argument
576 one_cmask_address_test(const char *name, const char *test, ADDR_HANDLE addrlib, const struct radeon_info *info, unsigned width, unsigned height, unsigned depth, unsigned bpp, unsigned swizzle_mode, bool pipe_aligned, bool rb_aligned, unsigned mrt_index, unsigned start_x, unsigned start_y, unsigned start_z) one_cmask_address_test() argument
675 unsigned swizzle_mode = info->gfx_level == GFX9 ? ADDR_SW_64KB_S_X : ADDR_SW_64KB_Z_X; run_cmask_address_test() local
[all...] |
| H A D | ac_surface.h | 232 uint8_t swizzle_mode; /* color or depth */ member
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| H A D | ac_surface.c | 1415 gfx9_get_preferred_swizzle_mode(ADDR_HANDLE addrlib, const struct radeon_info *info, struct radeon_surf *surf, ADDR2_COMPUTE_SURFACE_INFO_INPUT *in, bool is_fmask, AddrSwizzleMode *swizzle_mode) gfx9_get_preferred_swizzle_mode() argument
[all...] |
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_compute_blit.c | 845 unsigned swizzle_mode = tex->surface.u.gfx9.swizzle_mode; in gfx9_clear_dcc_msaa() local
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| H A D | radeon_uvd_enc.h | 296 uint32_t swizzle_mode; member
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| H A D | radeon_vcn_enc.h | 369 uint32_t swizzle_mode; member
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| /third_party/libdrm/include/drm/ |
| H A D | i915_drm.h | 1275 __u32 swizzle_mode; member
1292 __u32 swizzle_mode; member
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| /third_party/mesa3d/include/drm-uapi/ |
| H A D | i915_drm.h | 1707 __u32 swizzle_mode; member
1724 __u32 swizzle_mode; member
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