/third_party/ltp/tools/sparse/sparse-src/validation/backend/ |
H A D | bitwise-ops.c | 1 static int shl(int x, int y) in shl() function
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/third_party/musl/src/stdlib/ |
H A D | qsort.c | 68 static inline void shl(size_t p[2], int n) in shl() function
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/third_party/rust/crates/shlex/src/ |
H A D | lib.rs | 155 let mut shl = Shlex::new(in_str); in split() variables
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/third_party/rust/crates/minimal-lexical/src/ |
H A D | bigint.rs | 673 pub fn shl(x: &mut VecType, n: usize) -> Option<()> { in shl() functions
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/third_party/mesa3d/src/compiler/nir/tests/ |
H A D | load_store_vectorizer_tests.cpp | 628 nir_alu_instr *shl = nir_instr_as_alu(offset->parent_instr); in TEST_F() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ADT/ |
H A D | APInt.h | 1009 APInt shl(unsigned shiftAmt) const { in shl() function 1048 APInt shl(const APInt &ShiftAmt) const { in shl() function
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/third_party/node/deps/v8/src/compiler/ |
H A D | machine-operator-reducer.cc | 1928 Node* shl = nullptr; in TryMatchWord32Ror() local
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/third_party/mesa3d/src/nouveau/codegen/ |
H A D | nv50_ir_emit_nv50.cpp | 1640 CodeEmitterNV50::emitARL(const Instruction *i, unsigned int shl) in emitARL() argument
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H A D | nv50_ir_peephole.cpp | 1004 int shl = util_logbase2_64(b); in createMul() local 1023 int shl = subA ? util_logbase2_64(absB + 1) : util_logbase2_64(absB - 1); createMul() local 2460 Instruction *shl; tryADDToSHLADD() local [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/lib/Support/ |
H A D | APInt.cpp | 1171 APInt APInt::shl(const APInt &shiftAmt) const { in shl() function in APInt
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/third_party/skia/third_party/externals/tint/src/transform/ |
H A D | vertex_pulling.cc | 538 auto* shl = ctx.dst->Shl(u16s, ctx.dst->vec2<u32>(8u, 0u)); in Fetch() local 546 auto* shl = ctx.dst->Shl(u32s, ctx.dst->vec4<u32>(24u, 16u, 8u, 0u)); in Fetch() local 554 auto* shl = ctx.dst->Shl(u32s, ctx.dst->vec2<u32>(16u, 0u)); in Fetch() local 564 auto* shl = ctx.dst->Shl(xxyy, ctx.dst->vec4<u32>(16u, 0u, 16u, 0u)); Fetch() local 572 auto* shl = ctx.dst->Shl(i16s, ctx.dst->vec2<u32>(8u, 0u)); Fetch() local 580 auto* shl = ctx.dst->Shl(i32s, ctx.dst->vec4<u32>(24u, 16u, 8u, 0u)); Fetch() local 588 auto* shl = ctx.dst->Shl(i32s, ctx.dst->vec2<u32>(16u, 0u)); Fetch() local 598 auto* shl = ctx.dst->Shl(xxyy, ctx.dst->vec4<u32>(16u, 0u, 16u, 0u)); Fetch() local [all...] |
/third_party/rust/crates/rust-openssl/openssl/src/ |
H A D | bn.rs | 1342 fn shl(self, n: i32) -> BigNum { in shl() functions 1352 fn shl(self, n: i32) -> BigNum { in shl() functions
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/third_party/mesa3d/src/freedreno/.gitlab-ci/traces/ |
H A D | afuc_test.asm | 143 shl $02, $02, $regdata label
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/third_party/skia/src/core/ |
H A D | SkVM.cpp | 1006 I32 Builder::shl(I32 x, int bits) { in shl() function in skvm::Builder
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H A D | SkVM.h | 1261 SI I32 shl(I32 x, int bits) { return x->shl(x, bits); } in shl() function
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/third_party/vixl/src/aarch64/ |
H A D | logic-aarch64.cc | 1501 LogicVRegister Simulator::shl(VectorFormat vform, in shl() function in vixl::aarch64::Simulator
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/third_party/node/deps/v8/src/compiler/backend/arm/ |
H A D | instruction-selector-arm.cc | 1183 uint32_t shl = mleft.right().ResolvedValue(); in VisitWord32Sar() local
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/third_party/node/deps/v8/src/compiler/backend/mips/ |
H A D | instruction-selector-mips.cc | 627 uint32_t shl = mleft.right().ResolvedValue(); in VisitWord32Sar() local
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/third_party/node/deps/v8/src/codegen/ia32/ |
H A D | assembler-ia32.h | 672 void shl(Register dst, uint8_t imm8) { shl(Operand(dst), imm8); } in shl() function in v8::internal::Assembler
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H A D | assembler-ia32.cc | 1242 void Assembler::shl(Operand dst, uint8_t imm8) { in shl() function in v8::internal::Assembler
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/third_party/skia/third_party/externals/swiftshader/src/Shader/ |
H A D | ShaderCore.cpp | 908 void ShaderCore::shl(Vector4f &dst, const Vector4f &src0, const Vector4f &src1) in shl() function in sw::ShaderCore
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/third_party/node/deps/v8/src/compiler/backend/mips64/ |
H A D | instruction-selector-mips64.cc | 826 uint32_t shl = mleft.right().ResolvedValue(); in VisitWord32Sar() local
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/third_party/node/deps/v8/src/compiler/backend/loong64/ |
H A D | instruction-selector-loong64.cc | 810 uint32_t shl = mleft.right().ResolvedValue(); in VisitWord32Sar() local
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/third_party/node/deps/v8/src/compiler/backend/riscv64/ |
H A D | instruction-selector-riscv64.cc | 805 uint32_t shl = mleft.right().ResolvedValue(); in VisitWord32Sar() local
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/third_party/node/deps/v8/src/execution/arm64/ |
H A D | simulator-logic-arm64.cc | 1339 LogicVRegister Simulator::shl(VectorFormat vform, LogicVRegister dst, in shl() function in v8::internal::Simulator
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