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Searched defs:shift1 (Results 1 - 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_reg.c72 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1, in dmub_reg_update() argument
43 set_reg_field_values(struct dmub_reg_value_masks *field_value_mask, uint32_t addr, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, va_list ap) set_reg_field_values() argument
89 dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) dmub_reg_set() argument
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_reg.c72 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1, in dmub_reg_update() argument
43 set_reg_field_values(struct dmub_reg_value_masks *field_value_mask, uint32_t addr, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, va_list ap) set_reg_field_values() argument
89 dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) dmub_reg_set() argument
/kernel/linux/linux-5.10/drivers/clk/x86/
H A Dclk-cgu.h41 u8 shift1; member
138 u8 shift1; member
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/
H A Ddc_helper.c125 set_reg_field_values(struct dc_reg_value_masks *field_value_mask, uint32_t addr, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, va_list ap) set_reg_field_values() argument
242 generic_reg_update_ex(const struct dc_context *ctx, uint32_t addr, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) generic_reg_update_ex() argument
270 generic_reg_set_ex(const struct dc_context *ctx, uint32_t addr, uint32_t reg_val, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) generic_reg_set_ex() argument
333 generic_reg_get2(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2) generic_reg_get2() argument
343 generic_reg_get3(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3) generic_reg_get3() argument
355 generic_reg_get4(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4) generic_reg_get4() argument
369 generic_reg_get5(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5) generic_reg_get5() argument
385 generic_reg_get6(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6) generic_reg_get6() argument
403 generic_reg_get7(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6, uint8_t shift7, uint32_t mask7, uint32_t *field_value7) generic_reg_get7() argument
423 generic_reg_get8(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6, uint8_t shift7, uint32_t mask7, uint32_t *field_value7, uint8_t shift8, uint32_t mask8, uint32_t *field_value8) generic_reg_get8() argument
555 generic_indirect_reg_get(const struct dc_context *ctx, uint32_t addr_index, uint32_t addr_data, uint32_t index, int n, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, ...) generic_indirect_reg_get() argument
586 generic_indirect_reg_update_ex(const struct dc_context *ctx, uint32_t addr_index, uint32_t addr_data, uint32_t index, uint32_t reg_val, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) generic_indirect_reg_update_ex() argument
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/
H A Ddc_helper.c108 set_reg_field_values(struct dc_reg_value_masks *field_value_mask, uint32_t addr, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, va_list ap) set_reg_field_values() argument
223 generic_reg_update_ex(const struct dc_context *ctx, uint32_t addr, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) generic_reg_update_ex() argument
251 generic_reg_set_ex(const struct dc_context *ctx, uint32_t addr, uint32_t reg_val, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) generic_reg_set_ex() argument
288 generic_reg_get2(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2) generic_reg_get2() argument
298 generic_reg_get3(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3) generic_reg_get3() argument
310 generic_reg_get4(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4) generic_reg_get4() argument
324 generic_reg_get5(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5) generic_reg_get5() argument
340 generic_reg_get6(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6) generic_reg_get6() argument
358 generic_reg_get7(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6, uint8_t shift7, uint32_t mask7, uint32_t *field_value7) generic_reg_get7() argument
378 generic_reg_get8(const struct dc_context *ctx, uint32_t addr, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, uint8_t shift2, uint32_t mask2, uint32_t *field_value2, uint8_t shift3, uint32_t mask3, uint32_t *field_value3, uint8_t shift4, uint32_t mask4, uint32_t *field_value4, uint8_t shift5, uint32_t mask5, uint32_t *field_value5, uint8_t shift6, uint32_t mask6, uint32_t *field_value6, uint8_t shift7, uint32_t mask7, uint32_t *field_value7, uint8_t shift8, uint32_t mask8, uint32_t *field_value8) generic_reg_get8() argument
508 generic_indirect_reg_get(const struct dc_context *ctx, uint32_t addr_index, uint32_t addr_data, uint32_t index, int n, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, ...) generic_indirect_reg_get() argument
539 generic_indirect_reg_update_ex(const struct dc_context *ctx, uint32_t addr_index, uint32_t addr_data, uint32_t index, uint32_t reg_val, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) generic_indirect_reg_update_ex() argument
570 generic_indirect_reg_update_ex_sync(const struct dc_context *ctx, uint32_t index, uint32_t reg_val, int n, uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) generic_indirect_reg_update_ex_sync() argument
599 generic_indirect_reg_get_sync(const struct dc_context *ctx, uint32_t index, int n, uint8_t shift1, uint32_t mask1, uint32_t *field_value1, ...) generic_indirect_reg_get_sync() argument
[all...]
/kernel/linux/linux-6.6/drivers/clk/x86/
H A Dclk-cgu.h41 u8 shift1; member
138 u8 shift1; member
/kernel/linux/linux-5.10/drivers/clk/mvebu/
H A Darmada-37xx-periph.c74 u8 shift1; member
/kernel/linux/linux-6.6/drivers/clk/mvebu/
H A Darmada-37xx-periph.c74 u8 shift1; member

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