registers (definition) in projects: arkcompiler - OpenGrok search results

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Searched defs:registers (Results 1 - 10 of 10) sorted by relevance

/arkcompiler/ets_frontend/ets2panda/compiler/core/
H A D	regAllocator.cpp	`87 std::pair<bool, std::size_t> RegAllocatorBase::RegIndicesValid(const IRNode const ins, const Span<VReg > &registers) in RegIndicesValid() argument 150 const auto registers = in Run() local 219 const auto registers = Span<VReg *>(regs.data(), regs.data() + regCnt); in Run() local [all...]`
H A D	emitter.cpp	`149 auto registers = Span<const VReg *>(regs.data(), regs.data() + regCnt); in MatchFormat() local`
H A D	pandagen.cpp	`1342 void PandaGen::DefineGetterSetterByValue(const ir::AstNode *node, std::tuple<VReg, VReg, VReg, VReg> registers, in DefineGetterSetterByValue() argument`
/arkcompiler/ets_frontend/es2panda/compiler/core/
H A D	regAllocator.cpp	`84 auto registers = Span<VReg >(regs.data(), regs.data() + regCnt); in Run() local 100 auto registers = Span<VReg >(regs.data(), regs.data() + regCnt); in Run() local 133 auto registers = Span<VReg >(regs.data(), regs.data() + regCnt); in AdjustInsRegWhenHasSpill() local 155 void RegAllocator::AdjustInsSpill(const Span<VReg > &registers, IRNod argument 189 AdjustRangeInsSpill(Span<VReg > &registers, IRNode ins, ArenaList<IRNode *> &newInsns) AdjustRangeInsSpill() argument [all...]`
H A D	regAllocator.h	`78 bool CheckRegIndices(IRNode ins, const Span<VReg > &registers, in CheckRegIndices() argument`
/arkcompiler/ets_frontend/es2panda/compiler/core/emitter/
H A D	emitter.cpp	`134 auto registers = Span<const VReg *>(regs.data(), regs.data() + regCnt); in MatchFormat() local`
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/
H A D	encode.cpp	586 void Encoder::SaveRegisters([[maybe_unused]] RegMask registers, [[maybe_unused]] ssize_t slot, in SaveRegisters() argument 592 void Encoder::LoadRegisters([[maybe_unused]] RegMask registers, [[maybe_unused]] ssize_t slot, in LoadRegisters() argument 598 void Encoder::SaveRegisters([[maybe_unused]] RegMask registers, [[maybe_unused]] bool isFp, in SaveRegisters() argument 604 void Encoder::LoadRegisters([[maybe_unused]] RegMask registers, [[maybe_unused]] bool isFp, in LoadRegisters() argument 633 void Encoder::PushRegisters([[maybe_unused]] RegMask registers, [[maybe_unused]] bool isFp) in PushRegisters() argument 638 void Encoder::PopRegisters([[maybe_unused]] RegMask registers, [[maybe_unused]] bool isFp) in PopRegisters() argument
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/amd64/
H A D	encode.cpp	3090 void Amd64Encoder::LoadStoreRegisters(RegMask registers, ssize_t slot, size_t startReg, bool isFp) in LoadStoreRegisters() argument 3116 void Amd64Encoder::LoadStoreRegisters(RegMask registers, bool isFp, int32_t slot, Reg base, RegMask mask) in LoadStoreRegisters() argument 3156 void Amd64Encoder::SaveRegisters(RegMask registers, ssize_t slot, size_t startReg, bool isFp) in SaveRegisters() argument 3161 LoadRegisters(RegMask registers, ssize_t slot, size_t startReg, bool isFp) LoadRegisters() argument 3166 SaveRegisters(RegMask registers, bool isFp, ssize_t slot, Reg base, RegMask mask) SaveRegisters() argument 3171 LoadRegisters(RegMask registers, bool isFp, ssize_t slot, Reg base, RegMask mask) LoadRegisters() argument 3176 PushRegisters(RegMask registers, bool isFp) PushRegisters() argument 3190 PopRegisters(RegMask registers, bool isFp) PopRegisters() argument [all...]
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch32/
H A D	encode.cpp	330 void Aarch32Encoder::SaveRegisters(RegMask registers, ssize_t slot, size_t startReg, bool isFp) in SaveRegisters() argument 334 void Aarch32Encoder::LoadRegisters(RegMask registers, ssize_t slot, size_t startReg, bool isFp) in LoadRegisters() argument 339 void Aarch32Encoder::SaveRegisters(RegMask registers, bool isFp, ssize_t slot, Reg base, RegMask mask) in SaveRegisters() argument 343 void Aarch32Encoder::LoadRegisters(RegMask registers, bool isFp, ssize_t slot, Reg base, RegMask mask) in LoadRegisters() argument 3163 LoadStoreRegistersMainLoop(RegMask registers, ssize_t slot, Reg base, RegMask mask, bool isFp) LoadStoreRegistersMainLoop() argument 3189 LoadStoreRegisters(RegMask registers, ssize_t slot, Reg base, RegMask mask, bool isFp) LoadStoreRegisters() argument 3244 LoadStoreRegisters(RegMask registers, ssize_t slot, size_t startReg, bool isFp) LoadStoreRegisters() argument 3270 PushRegisters(RegMask registers, bool isFp) PushRegisters() argument 3277 PopRegisters(RegMask registers, bool isFp) PopRegisters() argument [all...]
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch64/
H A D	encode.cpp	3049 void Aarch64Encoder::LoadStoreRegisters(RegMask registers, ssize_t slot, size_t startReg, bool isFp) in LoadStoreRegisters() argument 3106 LoadStoreRegistersMainLoop(RegMask registers, bool isFp, int32_t slot, Reg base, RegMask mask) LoadStoreRegistersMainLoop() argument 3154 LoadStoreRegisters(RegMask registers, bool isFp, int32_t slot, Reg base, RegMask mask) LoadStoreRegisters() argument 3185 LoadStoreRegistersLoop(RegMask registers, ssize_t slot, size_t startReg, bool isFp, const vixl::aarch64::Register &baseReg) LoadStoreRegistersLoop() argument 3223 SaveRegisters(RegMask registers, ssize_t slot, size_t startReg, bool isFp) SaveRegisters() argument 3228 LoadRegisters(RegMask registers, ssize_t slot, size_t startReg, bool isFp) LoadRegisters() argument 3233 SaveRegisters(RegMask registers, bool isFp, ssize_t slot, Reg base, RegMask mask) SaveRegisters() argument 3238 LoadRegisters(RegMask registers, bool isFp, ssize_t slot, Reg base, RegMask mask) LoadRegisters() argument 3243 PushRegisters(RegMask registers, bool isFp) PushRegisters() argument 3276 PopRegisters(RegMask registers, bool isFp) PopRegisters() argument [all...]

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