Home
last modified time | relevance | path

Searched defs:mmCP_HQD_PQ_WPTR_POLL_ADDR (Results 1 - 18 of 18) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h580 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
H A Dgfx_7_2_d.h593 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
H A Dgfx_8_0_d.h643 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
H A Dgfx_8_1_d.h643 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h593 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
H A Dgfx_7_0_d.h580 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
H A Dgfx_8_0_d.h643 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
H A Dgfx_8_1_d.h643 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x3252 macro
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_1_offset.h3073 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x1252 macro
H A Dgc_9_0_offset.h2845 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x1252 macro
H A Dgc_9_2_1_offset.h3029 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x1252 macro
H A Dgc_10_3_0_offset.h4942 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x1fb6 macro
[all...]
H A Dgc_10_1_0_offset.h5309 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x1fb6 macro
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_1_offset.h3073 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x1252 macro
H A Dgc_9_0_offset.h2845 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x1252 macro
H A Dgc_9_2_1_offset.h3029 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x1252 macro
H A Dgc_10_3_0_offset.h4962 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x1fb6 macro
[all...]
H A Dgc_10_1_0_offset.h5327 #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x1fb6 macro
[all...]

Completed in 538 milliseconds