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Searched defs:mmCP_HQD_IQ_RPTR (Results 1 - 18 of 18) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h590 #define mmCP_HQD_IQ_RPTR 0x325c macro
H A Dgfx_7_2_d.h603 #define mmCP_HQD_IQ_RPTR 0x325c macro
H A Dgfx_8_0_d.h653 #define mmCP_HQD_IQ_RPTR 0x325c macro
H A Dgfx_8_1_d.h653 #define mmCP_HQD_IQ_RPTR 0x325c macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h603 #define mmCP_HQD_IQ_RPTR 0x325c macro
H A Dgfx_7_0_d.h590 #define mmCP_HQD_IQ_RPTR 0x325c macro
H A Dgfx_8_0_d.h653 #define mmCP_HQD_IQ_RPTR 0x325c macro
H A Dgfx_8_1_d.h653 #define mmCP_HQD_IQ_RPTR 0x325c macro
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_1_offset.h3091 #define mmCP_HQD_IQ_RPTR 0x125c macro
H A Dgc_9_0_offset.h2863 #define mmCP_HQD_IQ_RPTR 0x125c macro
H A Dgc_9_2_1_offset.h3047 #define mmCP_HQD_IQ_RPTR 0x125c macro
H A Dgc_10_3_0_offset.h4960 #define mmCP_HQD_IQ_RPTR 0x1fc0 macro
[all...]
H A Dgc_10_1_0_offset.h5327 #define mmCP_HQD_IQ_RPTR 0x1fc0 macro
[all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_1_offset.h3091 #define mmCP_HQD_IQ_RPTR 0x125c macro
H A Dgc_9_0_offset.h2863 #define mmCP_HQD_IQ_RPTR 0x125c macro
H A Dgc_9_2_1_offset.h3047 #define mmCP_HQD_IQ_RPTR 0x125c macro
H A Dgc_10_3_0_offset.h4980 #define mmCP_HQD_IQ_RPTR 0x1fc0 macro
[all...]
H A Dgc_10_1_0_offset.h5345 #define mmCP_HQD_IQ_RPTR 0x1fc0 macro
[all...]

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