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Searched defs:clk_mgr (Results 1 - 25 of 54) sorted by relevance

123

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv2_clk_mgr.c37 void rv2_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu) in rv2_clk_mgr_construct() argument
H A Drv1_clk_mgr_clk.c54 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rv1_dump_clk_registers() local
H A Drv1_clk_mgr.c37 void rv1_init_clocks(struct clk_mgr *clk_mgr) in rv1_init_clocks() argument
42 static int rv1_determine_dppclk_threshold(struct clk_mgr_internal *clk_mgr, struct dc_clocks *new_clocks) in rv1_determine_dppclk_threshold() argument
88 ramp_up_dispclk_with_dpp( struct clk_mgr_internal *clk_mgr, struct dc *dc, struct dc_clocks *new_clocks, bool safe_to_lower) ramp_up_dispclk_with_dpp() argument
194 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); rv1_update_clocks() local
296 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); rv1_enable_pme_wa() local
319 rv1_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu) rv1_clk_mgr_construct() argument
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H A Drv1_clk_mgr_vbios_smu.c84 static uint32_t rv1_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, unsigned int max_retries) in rv1_smu_wait_for_response() argument
102 int rv1_vbios_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, unsigned int msg_id, unsigned int param) in rv1_vbios_smu_send_msg_with_param() argument
123 int rv1_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in rv1_vbios_smu_set_dispclk() argument
146 int rv1_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in rv1_vbios_smu_set_dprefclk() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv2_clk_mgr.c37 void rv2_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu) in rv2_clk_mgr_construct() argument
H A Drv1_clk_mgr_clk.c54 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rv1_dump_clk_registers() local
H A Drv1_clk_mgr.c37 static void rv1_init_clocks(struct clk_mgr *clk_mgr) in rv1_init_clocks() argument
42 static int rv1_determine_dppclk_threshold(struct clk_mgr_internal *clk_mgr, struct dc_clocks *new_clocks) in rv1_determine_dppclk_threshold() argument
88 ramp_up_dispclk_with_dpp( struct clk_mgr_internal *clk_mgr, struct dc *dc, struct dc_clocks *new_clocks, bool safe_to_lower) ramp_up_dispclk_with_dpp() argument
194 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); rv1_update_clocks() local
296 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); rv1_enable_pme_wa() local
319 rv1_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu) rv1_clk_mgr_construct() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/
H A Ddce120_clk_mgr.c128 void dce120_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) in dce120_clk_mgr_construct() argument
140 void dce121_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) in dce121_clk_mgr_construct() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/
H A Dclk_mgr.c89 void clk_mgr_exit_optimized_pwr_state(const struct dc *dc, struct clk_mgr *clk_mgr) in clk_mgr_exit_optimized_pwr_state() argument
103 void clk_mgr_optimize_pwr_state(const struct dc *dc, struct clk_mgr *clk_mgr) in clk_mgr_optimize_pwr_state() argument
119 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create() local
206 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); dc_destroy_clk_mgr() local
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/
H A Ddce120_clk_mgr.c128 void dce120_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) in dce120_clk_mgr_construct() argument
140 void dce121_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) in dce121_clk_mgr_construct() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/
H A Ddce112_clk_mgr.c124 int dce112_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_clk_khz) in dce112_set_dispclk() argument
167 int dce112_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dce112_set_dprefclk() argument
224 dce112_clk_mgr_construct( struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) dce112_clk_mgr_construct() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/
H A Ddce60_clk_mgr.c85 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce60_get_dp_ref_freq_khz() local
159 dce60_clk_mgr_construct( struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) dce60_clk_mgr_construct() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/
H A Ddce60_clk_mgr.c85 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce60_get_dp_ref_freq_khz() local
159 dce60_clk_mgr_construct( struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) dce60_clk_mgr_construct() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
H A Ddcn32_clk_mgr_smu_msg.c50 static uint32_t dcn32_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, unsigned int max_retries) in dcn32_smu_wait_for_response() argument
68 static bool dcn32_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, uint32_t msg_id, uint32_t param_in, uint32_t *param_out) in dcn32_smu_send_msg_with_param() argument
93 void dcn32_smu_send_fclk_pstate_message(struct clk_mgr_internal *clk_mgr, bool enable) in dcn32_smu_send_fclk_pstate_message() argument
101 void dcn32_smu_send_cab_for_uclk_message(struct clk_mgr_internal *clk_mgr, unsigned int num_ways) in dcn32_smu_send_cab_for_uclk_message() argument
109 void dcn32_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr) in dcn32_smu_transfer_wm_table_dram_2_smu() argument
117 dcn32_smu_set_pme_workaround(struct clk_mgr_internal *clk_mgr) dcn32_smu_set_pme_workaround() argument
126 dcn32_smu_set_hard_min_by_freq(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint16_t freq_mhz) dcn32_smu_set_hard_min_by_freq() argument
143 dcn32_smu_wait_for_dmub_ack_mclk(struct clk_mgr_internal *clk_mgr, bool enable) dcn32_smu_wait_for_dmub_ack_mclk() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/
H A Dclk_mgr.c100 void clk_mgr_exit_optimized_pwr_state(const struct dc *dc, struct clk_mgr *clk_mgr) in clk_mgr_exit_optimized_pwr_state() argument
126 void clk_mgr_optimize_pwr_state(const struct dc *dc, struct clk_mgr *clk_mgr) in clk_mgr_optimize_pwr_state() argument
158 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNE in dc_clk_mgr_create() local
171 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); dc_clk_mgr_create() local
181 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); dc_clk_mgr_create() local
191 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); dc_clk_mgr_create() local
215 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); dc_clk_mgr_create() local
229 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); dc_clk_mgr_create() local
257 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); dc_clk_mgr_create() local
284 struct clk_mgr_vgh *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); dc_clk_mgr_create() local
296 struct clk_mgr_dcn31 *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); dc_clk_mgr_create() local
308 struct clk_mgr_dcn315 *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); dc_clk_mgr_create() local
320 struct clk_mgr_dcn316 *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); dc_clk_mgr_create() local
332 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); dc_clk_mgr_create() local
345 struct clk_mgr_dcn314 *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); dc_clk_mgr_create() local
368 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); dc_destroy_clk_mgr() local
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/
H A Ddce112_clk_mgr.c124 int dce112_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_clk_khz) in dce112_set_dispclk() argument
165 int dce112_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dce112_set_dprefclk() argument
223 dce112_clk_mgr_construct( struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) dce112_clk_mgr_construct() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/
H A Ddce110_clk_mgr.c280 dce110_clk_mgr_construct( struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) dce110_clk_mgr_construct() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
H A Ddcn201_clk_mgr.c77 static void dcn201_init_clocks(struct clk_mgr *clk_mgr) in dcn201_init_clocks() argument
90 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); dcn201_update_clocks() local
172 dcn201_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu, struct dccg *dccg) dcn201_clk_mgr_construct() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/
H A Ddce110_clk_mgr.c281 dce110_clk_mgr_construct( struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) dce110_clk_mgr_construct() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c86 static void dcn3_init_single_clock(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, unsigned int *entry_0, unsigned int *num_levels) in dcn3_init_single_clock() argument
107 static noinline void dcn3_build_wm_range_table(struct clk_mgr_internal *clk_mgr) in dcn3_build_wm_range_table() argument
152 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); dcn3_init_clocks() local
209 dcn30_get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) dcn30_get_vco_frequency_from_reg() argument
233 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); dcn3_update_clocks() local
349 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); dcn3_notify_wm_ranges() local
380 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); dcn3_set_hard_min_memclk() local
396 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); dcn3_set_hard_max_memclk() local
408 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); dcn3_get_memclk_states_from_smu() local
448 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); dcn3_enable_pme_wa() local
459 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); dcn30_notify_link_rate_change() local
491 dcn3_init_clocks_fpga(struct clk_mgr *clk_mgr) dcn3_init_clocks_fpga() argument
505 dcn3_clk_mgr_construct( struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu, struct dccg *dccg) dcn3_clk_mgr_construct() argument
563 dcn3_clk_mgr_destroy(struct clk_mgr_internal *clk_mgr) dcn3_clk_mgr_destroy() argument
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H A Ddcn30_clk_mgr_smu_msg.c52 static uint32_t dcn30_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, unsigned int max_retries) in dcn30_smu_wait_for_response() argument
74 static bool dcn30_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, uint32_t msg_id, uint32_t param_in, uint32_t *param_out) in dcn30_smu_send_msg_with_param() argument
100 bool dcn30_smu_test_message(struct clk_mgr_internal *clk_mgr, uint32_t input) in dcn30_smu_test_message() argument
114 bool dcn30_smu_get_smu_version(struct clk_mgr_internal *clk_mgr, unsigned int *version) in dcn30_smu_get_smu_version() argument
130 bool dcn30_smu_check_driver_if_version(struct clk_mgr_internal *clk_mgr) in dcn30_smu_check_driver_if_version() argument
149 dcn30_smu_check_msg_header_version(struct clk_mgr_internal *clk_mgr) dcn30_smu_check_msg_header_version() argument
167 dcn30_smu_set_dram_addr_high(struct clk_mgr_internal *clk_mgr, uint32_t addr_high) dcn30_smu_set_dram_addr_high() argument
175 dcn30_smu_set_dram_addr_low(struct clk_mgr_internal *clk_mgr, uint32_t addr_low) dcn30_smu_set_dram_addr_low() argument
183 dcn30_smu_transfer_wm_table_smu_2_dram(struct clk_mgr_internal *clk_mgr) dcn30_smu_transfer_wm_table_smu_2_dram() argument
191 dcn30_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr) dcn30_smu_transfer_wm_table_dram_2_smu() argument
200 dcn30_smu_set_hard_min_by_freq(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, uint16_t freq_mhz) dcn30_smu_set_hard_min_by_freq() argument
218 dcn30_smu_set_hard_max_by_freq(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, uint16_t freq_mhz) dcn30_smu_set_hard_max_by_freq() argument
249 dcn30_smu_get_dpm_freq_by_index(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, uint8_t dpm_level) dcn30_smu_get_dpm_freq_by_index() argument
267 dcn30_smu_get_dc_mode_max_dpm_freq(struct clk_mgr_internal *clk_mgr, PPCLK_e clk) dcn30_smu_get_dc_mode_max_dpm_freq() argument
284 dcn30_smu_set_min_deep_sleep_dcef_clk(struct clk_mgr_internal *clk_mgr, uint32_t freq_mhz) dcn30_smu_set_min_deep_sleep_dcef_clk() argument
292 dcn30_smu_set_num_of_displays(struct clk_mgr_internal *clk_mgr, uint32_t num_displays) dcn30_smu_set_num_of_displays() argument
300 dcn30_smu_set_external_client_df_cstate_allow(struct clk_mgr_internal *clk_mgr, bool enable) dcn30_smu_set_external_client_df_cstate_allow() argument
308 dcn30_smu_set_pme_workaround(struct clk_mgr_internal *clk_mgr) dcn30_smu_set_pme_workaround() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr_vbios_smu.c70 static uint32_t rn_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us, unsigned int max_retries) in rn_smu_wait_for_response() argument
89 int rn_vbios_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, unsigned int msg_id, unsigned int param) in rn_vbios_smu_send_msg_with_param() argument
110 int rn_vbios_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in rn_vbios_smu_get_smu_version() argument
119 int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in rn_vbios_smu_set_dispclk() argument
142 int rn_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in rn_vbios_smu_set_dprefclk() argument
156 rn_vbios_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) rn_vbios_smu_set_hard_min_dcfclk() argument
171 rn_vbios_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfclk_khz) rn_vbios_smu_set_min_deep_sleep_dcfclk() argument
186 rn_vbios_smu_set_phyclk(struct clk_mgr_internal *clk_mgr, int requested_phyclk_khz) rn_vbios_smu_set_phyclk() argument
194 rn_vbios_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) rn_vbios_smu_set_dppclk() argument
206 rn_vbios_smu_set_dcn_low_power_state(struct clk_mgr_internal *clk_mgr, enum dcn_pwr_state state) rn_vbios_smu_set_dcn_low_power_state() argument
221 rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn() argument
229 rn_vbios_smu_enable_pme_wa(struct clk_mgr_internal *clk_mgr) rn_vbios_smu_enable_pme_wa() argument
237 rn_vbios_smu_is_periodic_retraining_disabled(struct clk_mgr_internal *clk_mgr) rn_vbios_smu_is_periodic_retraining_disabled() argument
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H A Drn_clk_mgr.c101 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_set_low_power_state() local
112 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_update_clocks() local
213 get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) get_vco_frequency_from_reg() argument
246 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); rn_dump_clk_registers_internal() local
411 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); rn_enable_pme_wa() local
416 rn_init_clocks(struct clk_mgr *clk_mgr) rn_init_clocks() argument
485 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); rn_notify_wm_ranges() local
517 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); rn_notify_link_rate_change() local
841 rn_clk_mgr_construct( struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu, struct dccg *dccg) rn_clk_mgr_construct() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c103 void dcn20_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr, in dcn20_update_clocks_update_dpp_dto() argument
126 dcn20_update_clocks_update_dentist(struct clk_mgr_internal *clk_mgr) dcn20_update_clocks_update_dentist() argument
149 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); dcn2_update_clocks() local
273 dcn2_update_clocks_fpga(struct clk_mgr *clk_mgr, struct dc_state *context, bool safe_to_lower) dcn2_update_clocks_fpga() argument
331 dcn2_init_clocks(struct clk_mgr *clk_mgr) dcn2_init_clocks() argument
341 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); dcn2_enable_pme_wa() local
355 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); dcn2_read_clocks_from_hw_dentist() local
378 dcn2_get_clock(struct clk_mgr *clk_mgr, struct dc_state *context, enum dc_clock_type clock_type, struct dc_clock_config *clock_cfg) dcn2_get_clock() argument
424 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); dcn2_notify_link_rate_change() local
457 dcn20_clk_mgr_construct( struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_funcs *pp_smu, struct dccg *dccg) dcn20_clk_mgr_construct() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/
H A Ddce_clk_mgr.c131 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce_get_dp_ref_freq_khz() local
434 dce_clk_mgr_construct( struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) dce_clk_mgr_construct() argument
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