| /third_party/mesa3d/src/gallium/winsys/amdgpu/drm/ |
| H A D | amdgpu_surface.c | 63 amdgpu_surface_init(struct radeon_winsys *rws, const struct pipe_resource *tex, uint64_t flags, unsigned bpe, enum radeon_surf_mode mode, struct radeon_surf *surf) amdgpu_surface_init() argument
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| /third_party/mesa3d/src/gallium/winsys/radeon/drm/ |
| H A D | radeon_drm_surface.c | 66 surf_level_winsys_to_drm(struct radeon_surface_level *level_drm, const struct legacy_surf_level *level_ws, unsigned bpe) surf_level_winsys_to_drm() argument
78 surf_level_drm_to_winsys(struct legacy_surf_level *level_ws, const struct radeon_surface_level *level_drm, unsigned bpe) surf_level_drm_to_winsys() argument
90 surf_winsys_to_drm(struct radeon_surface *surf_drm, const struct pipe_resource *tex, unsigned flags, unsigned bpe, enum radeon_surf_mode mode, const struct radeon_surf *surf_ws) surf_winsys_to_drm() argument
345 radeon_winsys_surface_init(struct radeon_winsys *rws, const struct pipe_resource *tex, uint64_t flags, unsigned bpe, enum radeon_surf_mode mode, struct radeon_surf *surf_ws) radeon_winsys_surface_init() argument
376 unsigned fmask_flags, bpe; radeon_winsys_surface_init() local
[all...] |
| /third_party/mesa3d/src/amd/addrlib/src/ |
| H A D | addrinterface.cpp | 867 UINT_32 bpe = 0; in ElemSize() local
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| /third_party/libdrm/radeon/ |
| H A D | radeon_surface.h | 119 uint32_t bpe; member
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| H A D | radeon_surface.c | 167 surf_minify(struct radeon_surface *surf, struct radeon_surface_level *surflevel, unsigned bpe, unsigned level, uint32_t xalign, uint32_t yalign, uint32_t zalign, uint64_t offset) surf_minify() argument
570 eg_surf_minify(struct radeon_surface *surf, struct radeon_surface_level *surflevel, unsigned bpe, unsigned level, unsigned slice_pt, unsigned mtilew, unsigned mtileh, unsigned mtileb, uint64_t offset) eg_surf_minify() argument
611 eg_surface_init_1d(struct radeon_surface_manager *surf_man, struct radeon_surface *surf, struct radeon_surface_level *level, unsigned bpe, uint64_t offset, unsigned start_level) eg_surface_init_1d() argument
652 eg_surface_init_2d(struct radeon_surface_manager *surf_man, struct radeon_surface *surf, struct radeon_surface_level *level, unsigned bpe, unsigned tile_split, uint64_t offset, unsigned start_level) eg_surface_init_2d() argument
1421 si_surf_minify(struct radeon_surface *surf, struct radeon_surface_level *surflevel, unsigned bpe, unsigned level, uint32_t xalign, uint32_t yalign, uint32_t zalign, uint32_t slice_align, uint64_t offset) si_surf_minify() argument
1469 si_surf_minify_2d(struct radeon_surface *surf, struct radeon_surface_level *surflevel, unsigned bpe, unsigned level, unsigned slice_pt, uint32_t xalign, uint32_t yalign, uint32_t zalign, unsigned mtileb, uint64_t offset) si_surf_minify_2d() argument
1550 si_surface_init_1d(struct radeon_surface_manager *surf_man, struct radeon_surface *surf, struct radeon_surface_level *level, unsigned bpe, unsigned tile_mode, uint64_t offset, unsigned start_level) si_surface_init_1d() argument
1617 si_surface_init_2d(struct radeon_surface_manager *surf_man, struct radeon_surface *surf, struct radeon_surface_level *level, unsigned bpe, unsigned tile_mode, unsigned num_pipes, unsigned num_banks, unsigned tile_split, uint64_t offset, unsigned start_level) si_surface_init_2d() argument
1857 cik_get_2d_params(struct radeon_surface_manager *surf_man, unsigned bpe, unsigned nsamples, bool is_color, unsigned tile_mode, uint32_t *num_pipes, uint32_t *tile_split_ptr, uint32_t *num_banks, uint32_t *macro_tile_aspect, uint32_t *bank_w, uint32_t *bank_h) cik_get_2d_params() argument
2214 cik_surface_init_2d(struct radeon_surface_manager *surf_man, struct radeon_surface *surf, struct radeon_surface_level *level, unsigned bpe, unsigned tile_mode, unsigned tile_split, unsigned num_pipes, unsigned num_banks, uint64_t offset, unsigned start_level) cik_surface_init_2d() argument
[all...] |
| /third_party/mesa3d/src/amd/common/ |
| H A D | ac_surface.h | 311 uint8_t bpe : 5; member
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| H A D | ac_surface.c | 870 unsigned bpe = surf->bpe; in get_display_flag() local
3247 ac_nir_dcc_addr_from_coord(nir_builder *b, const struct radeon_info *info, unsigned bpe, struct gfx9_meta_equation *equation, nir_ssa_def *dcc_pitch, nir_ssa_def *dcc_height, nir_ssa_def *dcc_slice_size, nir_ssa_def *x, nir_ssa_def *y, nir_ssa_def *z, nir_ssa_def *sample, nir_ssa_def *pipe_xor) ac_nir_dcc_addr_from_coord() argument
[all...] |
| /third_party/mesa3d/src/gallium/drivers/r600/ |
| H A D | r600_texture.c | 211 unsigned i, bpe, flags = 0; in r600_init_surface() local
601 unsigned flags, bpe; r600_texture_get_fmask_info() local
[all...] |
| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_texture.c | 181 unsigned bpe; in si_init_surface() local
[all...] |
| /third_party/mesa3d/src/amd/addrlib/inc/ |
| H A D | addrinterface.h | 3601 UINT_32 bpe; ///< bits per element (e.g. block size for BCn format) member
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