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Searched defs:assm (Results 1 - 19 of 19) sorted by relevance

/third_party/node/deps/v8/src/codegen/
H A Dcode-comments.cc66 void CodeCommentsWriter::Emit(Assembler* assm) { in Emit() argument
H A Dconstant-pool.cc100 void ConstantPoolBuilder::EmitSharedEntries(Assembler* assm, in EmitSharedEntries() argument
125 void ConstantPoolBuilder::EmitGroup(Assembler* assm, in EmitGroup() argument
184 Emit(Assembler* assm) Emit() argument
218 ConstantPool(Assembler* assm) ConstantPool() argument
440 BlockScope(Assembler* assm, size_t margin) BlockScope() argument
446 BlockScope(Assembler* assm, PoolEmissionCheck check) BlockScope() argument
466 ConstantPool(Assembler* assm) ConstantPool() argument
689 BlockScope(Assembler* assm, size_t margin) BlockScope() argument
695 BlockScope(Assembler* assm, PoolEmissionCheck check) BlockScope() argument
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/third_party/vixl/test/aarch64/
H A Dtest-api-movprfx-aarch64.cc100 Assembler assm; in TEST() local
353 Assembler assm; in TEST() local
609 Assembler assm; TEST() local
671 Assembler assm; TEST() local
877 Assembler assm; TEST() local
1086 Assembler assm; TEST() local
1282 Assembler assm; TEST() local
1332 Assembler assm; TEST() local
1716 Assembler assm; TEST() local
1959 Assembler assm; TEST() local
2408 Assembler assm; TEST() local
2826 Assembler assm; TEST() local
3149 Assembler assm; TEST() local
3583 Assembler assm; TEST() local
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/third_party/node/deps/v8/src/codegen/shared-ia32-x64/
H A Dmacro-assembler-shared-ia32-x64.h100 Assembler* assm; member
495 PinsrHelper(Assembler* assm, AvxFn<Op> avx, NoAvxFn<Op> noavx, XMMRegister dst, XMMRegister src1, Op src2, uint8_t imm8, uint32_t* load_pc_offset = nullptr, base::Optional<CpuFeature> feature = base::nullopt) PinsrHelper() argument
977 SharedTurboAssembler* assm = this; FloatUnop() local
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/third_party/node/deps/v8/src/baseline/s390/
H A Dbaseline-assembler-s390-inl.h138 static void JumpIfHelper(MacroAssembler* assm, Condition cc, Register lhs, in JumpIfHelper() argument
/third_party/node/deps/v8/src/baseline/ppc/
H A Dbaseline-assembler-ppc-inl.h138 static void JumpIfHelper(MacroAssembler* assm, Condition cc, Register lhs, in JumpIfHelper() argument
/third_party/node/deps/v8/src/wasm/baseline/
H A Dliftoff-assembler.h1577 void EmitI64IndependentHalfOperation(LiftoffAssembler* assm, in EmitI64IndependentHalfOperation() argument
1602 void EmitI64IndependentHalfOperationImm(LiftoffAssembler* assm, in EmitI64IndependentHalfOperationImm() argument
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/third_party/vixl/test/aarch32/
H A Dtest-assembler-aarch32.cc3103 void CheckInstructionSetA32(const T& assm) { in CheckInstructionSetA32() argument
3111 void CheckInstructionSetT32(const T& assm) { in CheckInstructionSetT32() argument
3170 Assembler assm; in TEST_NOASM() local
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/third_party/node/deps/v8/src/codegen/riscv64/
H A Dassembler-riscv64.h1334 explicit VectorUnit(Assembler* assm) : assm_(assm) {} in VectorUnit() argument
/third_party/node/deps/v8/src/codegen/x64/
H A Dassembler-x64.h350 explicit ConstPool(Assembler* assm) : assm_(assm) {} in ConstPool() argument
/third_party/node/deps/v8/src/codegen/arm/
H A Dmacro-assembler-arm.cc2744 void F64x2ConvertLowHelper(Assembler* assm, QwNeonRegister dst, in CallRecordWriteStub() argument
/third_party/node/deps/v8/src/wasm/baseline/ia32/
H A Dliftoff-assembler-ia32.h71 inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, Register base, in Load() argument
99 inline void Store(LiftoffAssembler* assm, Register base, int32_t offset, in Store() argument
130 push(LiftoffAssembler* assm, LiftoffRegister reg, ValueKind kind, int padding = 0) push() argument
165 SignExtendI32ToI64(Assembler* assm, LiftoffRegister reg) SignExtendI32ToI64() argument
172 GetTmpByteRegister(LiftoffAssembler* assm, Register candidate) GetTmpByteRegister() argument
179 MoveStackValue(LiftoffAssembler* assm, const Operand& src, const Operand& dst) MoveStackValue() argument
1330 EmitCommutativeBinOp(LiftoffAssembler* assm, Register dst, Register lhs, Register rhs) EmitCommutativeBinOp() argument
1341 EmitCommutativeBinOpImm(LiftoffAssembler* assm, Register dst, Register lhs, int32_t imm) EmitCommutativeBinOpImm() argument
1355 EmitInt32DivOrRem(LiftoffAssembler* assm, Register dst, Register lhs, Register rhs, Label* trap_div_by_zero, Label* trap_div_unrepresentable) EmitInt32DivOrRem() argument
1469 EmitShiftOperation(LiftoffAssembler* assm, Register dst, Register src, Register amount, void (Assembler::*emit_shift)(Register)) EmitShiftOperation() argument
1556 OpWithCarry(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) OpWithCarry() argument
1585 OpWithCarryI(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister lhs, int64_t imm) OpWithCarryI() argument
1699 Emit64BitShiftOperation( LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister src, Register amount, void (TurboAssembler::*emit_shift)(Register, Register)) Emit64BitShiftOperation() argument
1935 EmitFloatMinOrMax(LiftoffAssembler* assm, DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs, MinOrMax min_or_max) EmitFloatMinOrMax() argument
2212 ConvertFloatToIntAndBack(LiftoffAssembler* assm, Register dst, DoubleRegister src, DoubleRegister converted_back, LiftoffRegList pinned) ConvertFloatToIntAndBack() argument
2238 EmitTruncateFloatToInt(LiftoffAssembler* assm, Register dst, DoubleRegister src, Label* trap) EmitTruncateFloatToInt() argument
2273 EmitSatTruncateFloatToInt(LiftoffAssembler* assm, Register dst, DoubleRegister src) EmitSatTruncateFloatToInt() argument
2507 setcc_32_no_spill(LiftoffAssembler* assm, Condition cond, Register dst, Register tmp_byte_reg) setcc_32_no_spill() argument
2514 setcc_32(LiftoffAssembler* assm, Condition cond, Register dst) setcc_32() argument
2597 EmitFloatSetCond(LiftoffAssembler* assm, Condition cond, Register dst, DoubleRegister lhs, DoubleRegister rhs) EmitFloatSetCond() argument
2654 EmitSimdCommutativeBinOp( LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs, base::Optional<CpuFeature> feature = base::nullopt) EmitSimdCommutativeBinOp() argument
2676 EmitSimdNonCommutativeBinOp( LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs, base::Optional<CpuFeature> feature = base::nullopt) EmitSimdNonCommutativeBinOp() argument
2700 EmitSimdShiftOp(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister operand, LiftoffRegister count) EmitSimdShiftOp() argument
2720 EmitSimdShiftOpImm(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister operand, int32_t count) EmitSimdShiftOpImm() argument
2733 EmitAnyTrue(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister src) EmitAnyTrue() argument
2743 EmitAllTrue(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister src, base::Optional<CpuFeature> feature = base::nullopt) EmitAllTrue() argument
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/third_party/node/deps/v8/src/wasm/baseline/arm/
H A Dliftoff-assembler-arm.h91 inline MemOperand GetMemOp(LiftoffAssembler* assm, in GetMemOp() argument
103 inline Register CalculateActualAddress(LiftoffAssembler* assm, in CalculateActualAddress() argument
154 inline void I64Binop(LiftoffAssembler* assm, LiftoffRegister dst, in I64Binop() argument
172 I64BinopI(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister lhs, int64_t imm) I64BinopI() argument
187 I64Shiftop(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister src, Register amount) I64Shiftop() argument
227 EmitFloatMinOrMax(LiftoffAssembler* assm, RegisterType dst, RegisterType lhs, RegisterType rhs, MinOrMax min_or_max) EmitFloatMinOrMax() argument
248 EnsureNoAlias(Assembler* assm, Register reg, Register must_not_alias, UseScratchRegisterScope* temps) EnsureNoAlias() argument
258 S128NarrowOp(LiftoffAssembler* assm, NeonDataType dt, NeonDataType sdt, LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) S128NarrowOp() argument
270 F64x2Compare(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs, Condition cond) F64x2Compare() argument
300 Store(LiftoffAssembler* assm, LiftoffRegister src, MemOperand dst, ValueKind kind) Store() argument
340 Load(LiftoffAssembler* assm, LiftoffRegister dst, MemOperand src, ValueKind kind) Load() argument
394 EmitSimdShift(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) EmitSimdShift() argument
410 EmitSimdShiftImmediate(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister lhs, int32_t rhs) EmitSimdShiftImmediate() argument
428 EmitAnyTrue(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister src) EmitAnyTrue() argument
1589 GeneratePopCnt(Assembler* assm, Register dst, Register src, Register scratch1, Register scratch2) GeneratePopCnt() argument
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/third_party/node/deps/v8/src/wasm/baseline/arm64/
H A Dliftoff-assembler-arm64.h131 inline MemOperand GetMemOp(LiftoffAssembler* assm, in GetMemOp() argument
149 inline Register GetEffectiveAddress(LiftoffAssembler* assm, in GetEffectiveAddress() argument
169 inline void EmitSimdShift(LiftoffAssembler* assm, VRegister dst, VRegister lhs, in EmitSimdShift() argument
194 EmitSimdShiftRightImmediate(LiftoffAssembler* assm, VRegister dst, VRegister lhs, int32_t rhs) EmitSimdShiftRightImmediate() argument
213 EmitAnyTrue(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister src) EmitAnyTrue() argument
224 EmitAllTrue(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister src, VectorFormat format) EmitAllTrue() argument
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/third_party/node/deps/v8/src/wasm/baseline/mips/
H A Dliftoff-assembler-mips.h90 inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, Register base, in Load() argument
117 inline void Store(LiftoffAssembler* assm, Register base, int32_t offset, in Store() argument
144 push(LiftoffAssembler* assm, LiftoffRegister reg, ValueKind kind) push() argument
168 EnsureNoAlias(Assembler* assm, Register reg, LiftoffRegister must_not_alias, UseScratchRegisterScope* temps) EnsureNoAlias() argument
181 ChangeEndiannessLoad(LiftoffAssembler* assm, LiftoffRegister dst, LoadType type, LiftoffRegList pinned) ChangeEndiannessLoad() argument
250 ChangeEndiannessStore(LiftoffAssembler* assm, LiftoffRegister src, StoreType type, LiftoffRegList pinned) ChangeEndiannessStore() argument
1089 Emit64BitShiftOperation( LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister src, Register amount, void (TurboAssembler::*emit_shift)(Register, Register, Register, Register, Register, Register, Register)) Emit64BitShiftOperation() argument
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/third_party/node/deps/v8/src/wasm/baseline/loong64/
H A Dliftoff-assembler-loong64.h82 inline MemOperand GetMemOp(LiftoffAssembler* assm, Register addr, in GetMemOp() argument
99 inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, MemOperand src, in Load() argument
125 Store(LiftoffAssembler* assm, Register base, int32_t offset, LiftoffRegister src, ValueKind kind) Store() argument
149 push(LiftoffAssembler* assm, LiftoffRegister reg, ValueKind kind) push() argument
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/third_party/node/deps/v8/src/wasm/baseline/x64/
H A Dliftoff-assembler-x64.h79 inline Operand GetMemOp(LiftoffAssembler* assm, Register addr, Register offset, in GetMemOp() argument
93 inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, Operand src, in Load() argument
119 inline void Store(LiftoffAssembler* assm, Operan argument
147 push(LiftoffAssembler* assm, LiftoffRegister reg, ValueKind kind, int padding = 0) push() argument
1055 EmitCommutativeBinOp(LiftoffAssembler* assm, Register dst, Register lhs, Register rhs) EmitCommutativeBinOp() argument
1067 EmitCommutativeBinOpImm(LiftoffAssembler* assm, Register dst, Register lhs, int32_t imm) EmitCommutativeBinOpImm() argument
1083 EmitIntDivOrRem(LiftoffAssembler* assm, Register dst, Register lhs, Register rhs, Label* trap_div_by_zero, Label* trap_div_unrepresentable) EmitIntDivOrRem() argument
1223 EmitShiftOperation(LiftoffAssembler* assm, Register dst, Register src, Register amount, void (Assembler::*emit_shift)(Register)) EmitShiftOperation() argument
1539 EmitFloatMinOrMax(LiftoffAssembler* assm, DoubleRegister dst, DoubleRegister lhs, DoubleRegister rhs, MinOrMax min_or_max) EmitFloatMinOrMax() argument
1805 ConvertFloatToIntAndBack(LiftoffAssembler* assm, Register dst, DoubleRegister src, DoubleRegister converted_back) ConvertFloatToIntAndBack() argument
1840 EmitTruncateFloatToInt(LiftoffAssembler* assm, Register dst, DoubleRegister src, Label* trap) EmitTruncateFloatToInt() argument
1872 EmitSatTruncateFloatToInt(LiftoffAssembler* assm, Register dst, DoubleRegister src) EmitSatTruncateFloatToInt() argument
1949 EmitSatTruncateFloatToUInt64(LiftoffAssembler* assm, Register dst, DoubleRegister src) EmitSatTruncateFloatToUInt64() argument
2210 EmitFloatSetCond(LiftoffAssembler* assm, Condition cond, Register dst, DoubleRegister lhs, DoubleRegister rhs) EmitFloatSetCond() argument
2287 EmitSimdCommutativeBinOp( LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs, base::Optional<CpuFeature> feature = base::nullopt) EmitSimdCommutativeBinOp() argument
2309 EmitSimdNonCommutativeBinOp( LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs, base::Optional<CpuFeature> feature = base::nullopt) EmitSimdNonCommutativeBinOp() argument
2333 EmitSimdShiftOp(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister operand, LiftoffRegister count) EmitSimdShiftOp() argument
2350 EmitSimdShiftOpImm(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister operand, int32_t count) EmitSimdShiftOpImm() argument
2363 EmitAnyTrue(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister src) EmitAnyTrue() argument
2371 EmitAllTrue(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister src, base::Optional<CpuFeature> feature = base::nullopt) EmitAllTrue() argument
3318 I32x4ExtMulHelper(LiftoffAssembler* assm, XMMRegister dst, XMMRegister src1, XMMRegister src2, bool low, bool is_signed) I32x4ExtMulHelper() argument
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/third_party/node/deps/v8/src/wasm/baseline/riscv64/
H A Dliftoff-assembler-riscv64.h81 inline MemOperand GetMemOp(LiftoffAssembler* assm, Register addr, in GetMemOp() argument
98 inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, MemOperand src, in Load() argument
121 Store(LiftoffAssembler* assm, Register base, int32_t offset, LiftoffRegister src, ValueKind kind) Store() argument
145 push(LiftoffAssembler* assm, LiftoffRegister reg, ValueKind kind) push() argument
171 ChangeEndiannessLoad(LiftoffAssembler* assm, LiftoffRegister dst, LoadType type, LiftoffRegList pinned) ChangeEndiannessLoad() argument
228 ChangeEndiannessStore(LiftoffAssembler* assm, LiftoffRegister src, StoreType type, LiftoffRegList pinned) ChangeEndiannessStore() argument
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/third_party/node/deps/v8/src/wasm/baseline/mips64/
H A Dliftoff-assembler-mips64.h82 inline MemOperand GetMemOp(LiftoffAssembler* assm, Register addr, in GetMemOp() argument
99 inline void Load(LiftoffAssembler* assm, LiftoffRegister dst, MemOperand src, in Load() argument
125 Store(LiftoffAssembler* assm, Register base, int32_t offset, LiftoffRegister src, ValueKind kind) Store() argument
152 push(LiftoffAssembler* assm, LiftoffRegister reg, ValueKind kind) push() argument
182 ChangeEndiannessLoad(LiftoffAssembler* assm, LiftoffRegister dst, LoadType type, LiftoffRegList pinned) ChangeEndiannessLoad() argument
239 ChangeEndiannessStore(LiftoffAssembler* assm, LiftoffRegister src, StoreType type, LiftoffRegList pinned) ChangeEndiannessStore() argument
1915 EmitAnyTrue(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister src) EmitAnyTrue() argument
1925 EmitAllTrue(LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister src, MSABranchDF msa_branch_df) EmitAllTrue() argument
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