H A D | simulator-arm.cc | 3935 void Unop(Simulator* simulator, int Vd, int Vm, std::function<T(T)> unop) { in Unop() argument 3946 void Binop(Simulator* simulator, int Vd, int Vm, int Vn, in Binop() argument 3967 void Widen(Simulator* simulator, int Vd, int Vm) { in Widen() argument 3979 void Abs(Simulator* simulator, int Vd, int Vm) { in Abs() argument 3984 void Neg(Simulator* simulator, int Vd, int Vm) { in Neg() argument 3992 SaturatingNarrow(Simulator* simulator, int Vd, int Vm) SaturatingNarrow() argument 4004 AddSat(Simulator* simulator, int Vd, int Vm, int Vn) AddSat() argument 4009 SubSat(Simulator* simulator, int Vd, int Vm, int Vn) SubSat() argument 4014 Zip(Simulator* simulator, int Vd, int Vm) Zip() argument 4031 Unzip(Simulator* simulator, int Vd, int Vm) Unzip() argument 4048 Transpose(Simulator* simulator, int Vd, int Vm) Transpose() argument 4062 Test(Simulator* simulator, int Vd, int Vm, int Vn) Test() argument 4068 Add(Simulator* simulator, int Vd, int Vm, int Vn) Add() argument 4073 Sub(Simulator* simulator, int Vd, int Vm, int Vn) Sub() argument 4123 Mul(Simulator* simulator, int Vd, int Vm, int Vn) Mul() argument 4135 ShiftLeft(Simulator* simulator, int Vd, int Vm, int shift) ShiftLeft() argument 4140 LogicalShiftRight(Simulator* simulator, int Vd, int Vm, int shift) LogicalShiftRight() argument 4145 ArithmeticShiftRight(Simulator* simulator, int Vd, int Vm, int shift) ArithmeticShiftRight() argument 4152 ShiftRight(Simulator* simulator, int Vd, int Vm, int shift, bool is_unsigned) ShiftRight() argument 4163 ShiftRightAccumulate(Simulator* simulator, int Vd, int Vm, int shift) ShiftRightAccumulate() argument 4169 ArithmeticShiftRightAccumulate(Simulator* simulator, int Vd, int Vm, int shift) ArithmeticShiftRightAccumulate() argument 4178 ShiftLeftAndInsert(Simulator* simulator, int Vd, int Vm, int shift) ShiftLeftAndInsert() argument 4192 ShiftRightAndInsert(Simulator* simulator, int Vd, int Vm, int shift) ShiftRightAndInsert() argument 4206 ShiftByRegister(Simulator* simulator, int Vd, int Vm, int Vn) ShiftByRegister() argument 4240 CompareEqual(Simulator* simulator, int Vd, int Vm, int Vn) CompareEqual() argument 4245 CompareGreater(Simulator* simulator, int Vd, int Vm, int Vn, bool ge) CompareGreater() argument 4262 MinMax(Simulator* simulator, int Vd, int Vm, int Vn, bool min) MinMax() argument 4273 PairwiseMinMax(Simulator* simulator, int Vd, int Vm, int Vn, bool min) PairwiseMinMax() argument 4287 PairwiseAdd(Simulator* simulator, int Vd, int Vm, int Vn) PairwiseAdd() argument 4301 PairwiseAddLong(Simulator* simulator, int Vd, int Vm) PairwiseAddLong() argument 4315 PairwiseAddAccumulateLong(Simulator* simulator, int Vd, int Vm) PairwiseAddAccumulateLong() argument 4330 MultiplyLong(Simulator* simulator, int Vd, int Vn, int Vm) MultiplyLong() argument 4381 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4405 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4487 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4509 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4573 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4592 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4609 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4636 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4665 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4682 int Vd = instr->VFPDRegValue(kDoublePrecision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4702 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4736 int Vd = instr->VFPDRegValue(kDoublePrecision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4770 int Vd = instr->VFPDRegValue(kDoublePrecision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4848 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4871 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4976 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 4988 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDTwoOrThreeRegisters() local 5049 int Vd, Vm, Vn; DecodeAdvancedSIMDDataProcessing() local 5559 int Vd = instr->VFPDRegValue(q ? kSimd128Precision : kDoublePrecision); DecodeAdvancedSIMDDataProcessing() local 5583 int Vd = instr->VFPDRegValue(kDoublePrecision); DecodeAdvancedSIMDDataProcessing() local 5624 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDDataProcessing() local 5642 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDDataProcessing() local 5661 int Vd = instr->VFPDRegValue(kSimd128Precision); DecodeAdvancedSIMDDataProcessing() local 5682 int Vd = instr->VFPDRegValue(kDoublePrecision); DecodeAdvancedSIMDDataProcessing() local 5703 int Vd = instr->VFPDRegValue(kDoublePrecision); DecodeAdvancedSIMDDataProcessing() local 5762 int Vd = instr->VFPDRegValue(kDoublePrecision); DecodeAdvancedSIMDLoadStoreMultipleStructures() local 5815 int Vd = instr->VFPDRegValue(kDoublePrecision); DecodeAdvancedSIMDLoadSingleStructureToAllLanes() local 5864 int Vd = instr->VFPDRegValue(kDoublePrecision); DecodeAdvancedSIMDLoadStoreSingleStructureToOneLane() local [all...] |