Searched defs:SrcReg0 (Results 1 - 4 of 4) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64SIMDInstrOpt.cpp | 430 Register SrcReg0 = MI.getOperand(1).getReg(); in optimizeVectElement() local
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| H A D | AArch64InstrInfo.cpp | 2828 unsigned SrcReg0 = SrcReg; in storeRegPairToStackSlot() local
4179 Register SrcReg0 = MUL->getOperand(1).getReg(); in genFusedMultiply() local
4330 Register SrcReg0 in genMaddR() local
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| /third_party/mesa3d/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_program_alu.c | 60 emit2( struct radeon_compiler * c, struct rc_instruction * after, rc_opcode Opcode, struct rc_sub_instruction * base, struct rc_dst_register DstReg, struct rc_src_register SrcReg0, struct rc_src_register SrcReg1) emit2() argument
79 emit3( struct radeon_compiler * c, struct rc_instruction * after, rc_opcode Opcode, struct rc_sub_instruction * base, struct rc_dst_register DstReg, struct rc_src_register SrcReg0, struct rc_src_register SrcReg1, struct rc_src_register SrcReg2) emit3() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 1362 Register SrcReg0 = I.getOperand(1).getReg(); in selectMergeValues() local
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