/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/CodeView/ |
H A D | StringsAndChecksums.cpp | 32 initializeStrings( const DebugSubsectionRecord &SR) initializeStrings() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/PDB/Native/ |
H A D | NativeTypeVTShape.cpp | 7 NativeTypeVTShape(NativeSession &Session, SymIndexId Id, codeview::TypeIndex TI, codeview::VFTableShapeRecord SR) NativeTypeVTShape() argument
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/third_party/elfutils/backends/ |
H A D | x86_64_corenote.c | 54 #define SR(at, n, dwreg) \ macro 83 #undef SR macro
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H A D | i386_corenote.c | 47 #define SR(at, n, dwreg) \ macro 67 #undef SR macro
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
H A D | RDFCopy.cpp | 149 RegisterRef SR = FR->second; in run() local
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H A D | HexagonGenPredicate.cpp | 474 RegisterSubReg SR = MI.getOperand(1); in eliminatePredCopies() local
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H A D | HexagonVExtract.cpp | 165 unsigned SR = ExtI->getOperand(1).getSubReg(); in runOnMachineFunction() local
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H A D | RDFRegisters.cpp | 185 unsigned SR = SI.getSubReg(); in aliasRM() local
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H A D | HexagonEarlyIfConv.cpp | 818 unsigned TR = 0, TSR = 0, FR = 0, FSR = 0, SR = 0, SSR = 0; in updatePhiNodes() local
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H A D | HexagonSplitDouble.cpp | 607 unsigned SR = Op.getSubReg(); in createHalfInstr() local
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/third_party/mesa3d/src/asahi/compiler/ |
H A D | agx_opcodes.py | 99 SR = enum("sr", { variable
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
H A D | RenameIndependentSubregs.cpp | 69 LiveInterval::SubRange *SR; member 186 const LiveInterval::SubRange &SR = *SRInfo.SR; in findComponents() local 231 const LiveInterval::SubRange &SR = *SRInfo.SR; rewriteOperands() local 273 LiveInterval::SubRange &SR = *SRInfo.SR; distribute() local [all...] |
H A D | VirtRegMap.cpp | 294 const LiveInterval::SubRange *SR = RangeIterPair.first; in addLiveInsForSubRanges() local [all...] |
H A D | ImplicitNullChecks.cpp | 590 SuitabilityResult SR = isSuitableMemoryOp(MI, PointerReg, InstsSeenSoFar); in analyzeBlockForNullChecks() local
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/third_party/node/deps/openssl/config/archs/darwin64-x86_64-cc/asm/crypto/aes/ |
H A D | bsaes-x86_64.s | |
/third_party/node/deps/openssl/config/archs/darwin64-x86_64-cc/asm_avx2/crypto/aes/ |
H A D | bsaes-x86_64.s | |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
H A D | YAMLParser.h | 160 void setSourceRange(SMRange SR) { SourceRange = SR; } in setSourceRange() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/ |
H A D | FunctionComparator.cpp | 77 const fltSemantics &SL = L.getSemantics(), &SR = R.getSemantics(); in cmpAPFloats() local
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H A D | IntegerDivision.cpp | 256 Value *SR = Builder.CreateSub(Tmp0, Tmp1); in generateUnsignedDivisionCode() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/Support/ |
H A D | YAMLParser.h | 135 void setSourceRange(SMRange SR) { SourceRange = SR; } in setSourceRange() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
H A D | BPFAbstractMemberAccess.cpp | 225 const DISubrange *SR = cast<DISubrange>(Element); in calcArraySize() local
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H A D | BTFDebug.cpp | 486 const DISubrange *SR = cast<DISubrange>(Element); in visitArrayType() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Analysis/ |
H A D | RegionInfoImpl.h | 555 const RegionT *SR = Element->template getNodeAs<RegionT>(); in verifyBBMap() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/ExecutionEngine/ |
H A D | ExecutionEngine.cpp | 505 EngineBuilder::setSymbolResolver(std::unique_ptr<LegacyJITSymbolResolver> SR) { in setSymbolResolver() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
H A D | ARCISelLowering.cpp | 192 SDValue SR = DAG.getNode(ISD::SRA, dl, MVT::i32, LS, in LowerSIGN_EXTEND_INREG() local
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