SDMA0_PHASE0_QUANTUM__VALUE__SHIFT (definition) in projects: kernel

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Searched defs:SDMA0_PHASE0_QUANTUM__VALUE__SHIFT (Results 1 - 21 of 21) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A D	sdma0_4_0_sh_mask.h	`597 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
H A D	sdma0_4_1_sh_mask.h	`596 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
H A D	sdma0_4_2_2_sh_mask.h	`605 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
H A D	sdma0_4_2_sh_mask.h	`599 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A D	sdma0_4_1_sh_mask.h	`596 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
H A D	sdma0_4_0_sh_mask.h	`597 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
H A D	sdma0_4_2_2_sh_mask.h	`605 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
H A D	sdma0_4_2_sh_mask.h	`599 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/oss/
H A D	oss_2_0_sh_mask.h	`1014 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
H A D	oss_2_4_sh_mask.h	`1104 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
H A D	oss_3_0_sh_mask.h	`1630 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
H A D	oss_3_0_1_sh_mask.h	`1124 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/oss/
H A D	oss_2_0_sh_mask.h	`1014 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
H A D	oss_2_4_sh_mask.h	`1104 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
H A D	oss_3_0_1_sh_mask.h	`1124 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
H A D	oss_3_0_sh_mask.h	`1630 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro`
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A D	sdma_4_4_0_sh_mask.h	`292 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro [all...]`
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/gc/
H A D	gc_10_1_0_sh_mask.h	`311 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro [all...]`
H A D	gc_10_3_0_sh_mask.h	`312 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro [all...]`
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
H A D	gc_10_3_0_sh_mask.h	`312 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro [all...]`
H A D	gc_10_1_0_sh_mask.h	`311 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro [all...]`

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