| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 24 MCRegisterInfo::getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, in getMatchingSuperReg() argument
32 MCRegister MCRegisterInfo::getSubReg(MCRegister Reg, unsigned Idx) const { in getSubReg() argument
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| H A D | MCInstrDesc.cpp | 44 bool MCInstrDesc::hasImplicitDefOfPhysReg(unsigned Reg, in hasImplicitDefOfPhysReg() argument
53 bool MCInstrDesc::hasDefOfPhysReg(const MCInst &MI, unsigned Reg, in hasDefOfPhysReg() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUGlobalISelUtils.cpp | 17 AMDGPU::getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg) { in getBaseWithConstantOffset() argument
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| H A D | GCNRegPressure.cpp | 43 const unsigned Reg = Register::index2VirtReg(I); in printLivesAt() local
85 unsigned GCNRegPressure::getRegKind(unsigned Reg, in getRegKind() argument
97 void GCNRegPressure::inc(unsigned Reg, in inc() argument
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| H A D | GISelChangeObserver.cpp | 18 changingAllUsesOfReg( const MachineRegisterInfo &MRI, unsigned Reg) changingAllUsesOfReg() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiBaseInfo.h | 40 static inline unsigned getLanaiRegisterNumbering(unsigned Reg) { in getLanaiRegisterNumbering() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsOptionRecord.cpp | 73 void MipsRegInfoRecord::SetPhysRegUsed(unsigned Reg, in SetPhysRegUsed() argument
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| /third_party/mesa3d/src/gallium/drivers/r600/ |
| H A D | egd_tables.py | 135 class Reg: class
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| H A D | AllocationOrder.h | 62 unsigned Reg = Order[Pos++]; in next() local
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| H A D | DeadMachineInstructionElim.cpp | 79 Register Reg = MO.getReg(); in isDead() local
153 Register Reg = MO.getReg(); in runOnMachineFunction() local
172 Register Reg in runOnMachineFunction() local
[all...] |
| H A D | MIRVRegNamerUtils.h | 33 Register Reg; member in llvm::VRegRenamer::NamedVReg
37 NamedVReg(Register Reg, std::string Name = "") : Reg(Reg), Name(Name) {} in NamedVReg() argument
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| H A D | RegAllocBase.cpp | 76 unsigned Reg = Register::index2VirtReg(i); in seedLiveRegs() local
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| H A D | TargetFrameLoweringImpl.cpp | 121 unsigned Reg = CSRegs[i]; in determineCalleeSaves() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| H A D | MCInstBuilder.h | 31 MCInstBuilder &addReg(unsigned Reg) { in addReg() argument
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| H A D | MCRegister.h | 23 unsigned Reg; member in llvm::MCRegister
46 static bool isStackSlot(unsigned Reg) { in isStackSlot() argument
52 static bool isPhysicalRegister(unsigned Reg) { in isPhysicalRegister() argument
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMInstrInfo.cpp | 120 Register Reg = MI->getOperand(0).getReg(); in expandLoadStackGuard() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| H A D | LanaiMachineFunctionInfo.h | 47 void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; } in setSRetReturnReg() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.h | 27 unsigned Reg = 0; in getCRFromCRBit() local
[all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| H A D | SystemZMCTargetDesc.h | 64 inline unsigned getRegAsGR64(unsigned Reg) { in getRegAsGR64() argument
69 inline unsigned getRegAsGR32(unsigned Reg) { in getRegAsGR32() argument
74 inline unsigned getRegAsGRH32(unsigned Reg) { in getRegAsGRH32() argument
79 inline unsigned getRegAsVR128(unsigned Reg) { in getRegAsVR128() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.h | 34 inline bool isHighReg(unsigned int Reg) { in isHighReg() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyDebugValueManager.cpp | 32 void WebAssemblyDebugValueManager::updateReg(unsigned Reg) { in updateReg() argument
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| H A D | WebAssemblyOptimizeLiveIntervals.cpp | 84 unsigned Reg = Register::index2VirtReg(I); in runOnMachineFunction() local
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| H A D | WebAssemblyPrepareForLiveIntervals.cpp | 65 static bool hasArgumentDef(unsigned Reg, const MachineRegisterInfo &MRI) { in hasArgumentDef() argument
98 unsigned Reg = Register::index2VirtReg(I); in runOnMachineFunction() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
| H A D | XCoreFrameToArgsOffsetElim.cpp | 58 Register Reg = OldInst.getOperand(0).getReg(); in runOnMachineFunction() local
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| /third_party/python/Lib/distutils/tests/ |
| H A D | test_msvc9compiler.py | 124 from distutils.msvc9compiler import Reg namespace
|