/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
H A D | AArch64PBQPRegAlloc.cpp | 158 bool A57ChainingConstraint::addIntraChainConstraint(PBQPRAGraph &G, unsigned Rd, in addIntraChainConstraint() argument 242 void A57ChainingConstraint::addInterChainConstraint(PBQPRAGraph &G, unsigned Rd, in addInterChainConstraint() argument 362 Register Rd = MI.getOperand(0).getReg(); apply() local 372 Register Rd = MI.getOperand(0).getReg(); apply() local [all...] |
/third_party/ffmpeg/libavcodec/ |
H A D | jpeglsenc.c | 148 int Ra = R(tmp, 0), Rb, Rc = last2, Rd; in ls_encode_line() local
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H A D | jpeglsdec.c | 236 int Ra, Rb, Rc, Rd; in ls_decode_line() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/Disassembler/ |
H A D | MSP430Disassembler.cpp | 194 unsigned Rd = fieldFromInstruction(Insn, 0, 4); in DecodeDstAddrMode() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Disassembler/ |
H A D | RISCVDisassembler.cpp | 296 unsigned Rd = fieldFromInstruction(Insn, 7, 5); in decodeRVCInstrRdRs2() local 306 unsigned Rd = fieldFromInstruction(Insn, 7, 5); in decodeRVCInstrRdRs1Rs2() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 845 unsigned Rd = fieldFromInstruction(Insn, 0, 5); in DecodeFMOVLaneInstruction() local 936 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeThreeAddrSRegInstruction() local 998 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeMoveImmInstruction() local 1507 unsigned Rd in DecodeAddSubERegInstruction() local 1564 unsigned Rd = fieldFromInstruction(insn, 0, 5); DecodeLogicalImmInstruction() local 1595 unsigned Rd = fieldFromInstruction(insn, 0, 5); DecodeModImmInstruction() local 1634 unsigned Rd = fieldFromInstruction(insn, 0, 5); DecodeModImmTiedInstruction() local 1651 unsigned Rd = fieldFromInstruction(insn, 0, 5); DecodeAdrInstruction() local 1670 unsigned Rd = fieldFromInstruction(insn, 0, 5); DecodeAddSubImmShift() local [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
H A D | IceAssemblerMIPS32.cpp | 271 const IValueT Rd = encodeGPRegister(OpRd, "Rd", InsnName); in emitRdRtSa() local 284 const IValueT Rd = encodeGPRegister(OpRd, "Rd", InsnName); in emitRdRsRt() local 527 const IValueT Rd = encodeGPRegister(OpRd, "Rd", "clz"); in clz() local 657 const IValueT Rd = jalr() local 774 IValueT Rd = encodeGPRegister(OpRd, "Rd", "mfhi"); mfhi() local 781 IValueT Rd = encodeGPRegister(OpRd, "Rd", "mflo"); mflo() local 821 const IValueT Rd = encodeGPRegister(OpRd, "Rd", "pseudo-move"); move() local 840 const IValueT Rd = encodeGPRegister(OpRd, "Rd", "movf"); movf() local 875 const IValueT Rd = encodeGPRegister(OpRd, "Rd", "movt"); movt() local [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
H A D | HexagonConstExtenders.cpp | 325 Register Rd; member [all...] |
H A D | HexagonFrameLowering.cpp | 2407 unsigned Rd = RdOp.getReg(), Rs = RsOp.getReg(); expandAlloca() local [all...] |
H A D | HexagonInstrInfo.cpp | 1234 Register Rd = Op0.getReg(); in expandPostRAPseudo() local [all...] |
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/AsmParser/ |
H A D | HexagonAsmParser.cpp | 1680 MCOperand &Rd = Inst.getOperand(0); in processInstruction() local 1713 MCOperand &Rd = Inst.getOperand(0); in processInstruction() local 1723 MCOperand &Rd = Inst.getOperand(0); in processInstruction() local 1911 MCOperand &Rd = Inst.getOperand(0); in processInstruction() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
H A D | ARMDisassembler.cpp | 2196 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeQADDInstruction() local 2422 unsigned Rd = fieldFromInstruction(Insn, 8, 4); in DecodeT2MOVTWInstruction() local 2446 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeArmMOVTWInstruction() local 2473 unsigned Rd = fieldFromInstruction(Insn, 16, 4); in DecodeSMLAInstruction() local 2685 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVLDInstruction() local 3012 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVSTInstruction() local 3282 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVLD1DupInstruction() local 3329 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVLD2DupInstruction() local 3377 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVLD3DupInstruction() local 3412 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVLD4DupInstruction() local 3465 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVMOVModImmInstruction() local 3564 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVSHLMaxInstruction() local 3607 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeTBLInstruction() local 4773 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeDoubleRegStore() local 4902 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVLD1LN() local 4969 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVST1LN() local 5034 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVLD2LN() local 5101 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVST2LN() local 5164 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVLD3LN() local 5234 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVST3LN() local 5297 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVLD4LN() local 5378 unsigned Rd = fieldFromInstruction(Insn, 12, 4); DecodeVST4LN() local 5602 const unsigned Rd = fieldFromInstruction(Insn, 8, 4); DecodeT2Adr() local 6623 const unsigned Rd = fieldFromInstruction(Insn, 8, 4); DecodeT2AddSubSPImm() local [all...] |