Searched defs:RS1 (Results 1 - 3 of 3) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| H A D | SparcAsmPrinter.cpp | 125 EmitBinary(MCStreamer &OutStreamer, unsigned Opcode, MCOperand &RS1, MCOperand &Src2, MCOperand &RD, const MCSubtargetInfo &STI) EmitBinary() argument
137 EmitOR(MCStreamer &OutStreamer, MCOperand &RS1, MCOperand &Imm, MCOperand &RD, const MCSubtargetInfo &STI) EmitOR() argument
143 EmitADD(MCStreamer &OutStreamer, MCOperand &RS1, MCOperand &RS2, MCOperand &RD, const MCSubtargetInfo &STI) EmitADD() argument
149 EmitSHL(MCStreamer &OutStreamer, MCOperand &RS1, MCOperand &Imm, MCOperand &RD, const MCSubtargetInfo &STI) EmitSHL() argument
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSplitDouble.cpp | 922 unsigned RS1 = getRegState(Op1); in splitAslOr() local
|
| /third_party/pcre2/pcre2/src/sljit/ |
| H A D | sljitNativeRISCV_common.c | 66 #define RS1(rs1) ((sljit_ins)reg_map[rs1] << 15) macro
[all...] |
Completed in 5 milliseconds