PORT_LOGIC_LINK_WIDTH_4_LANES (definition) in projects: device - OpenGrok search results

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Searched defs:PORT_LOGIC_LINK_WIDTH_4_LANES (Results 1 - 1 of 1) sorted by relevance

/device/soc/rockchip/common/sdk_linux/drivers/pci/controller/dwc/
H A D	pcie-designware.h	`69 #define PORT_LOGIC_LINK_WIDTH_4_LANES PORT_LOGIC_LINK_WIDTH(0x4) macro`

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