| /third_party/icu/icu4c/source/test/intltest/ |
| H A D | tscoll.h | 28 struct Order struct in IntlTestCollator
|
| H A D | ssearch.cpp | 334 struct Order struct [all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| H A D | IceIntrinsics.cpp | 32 bool Intrinsics::isMemoryOrderValid(IntrinsicID ID, uint64_t Order, in isMemoryOrderValid() argument
|
| /third_party/lzma/CPP/7zip/Compress/ |
| H A D | PpmdEncoder.h | 21 int Order;
member
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| H A D | AllocationOrder.h | 31 ArrayRef<MCPhysReg> Order; member in llvm::AllocationOrder
|
| H A D | BreakFalseDeps.cpp | 144 ArrayRef<MCPhysReg> Order = RegClassInfo.getOrder(OpRC); in pickBestRegisterForUndef() local
|
| H A D | CriticalAntiDepBreaker.cpp | 407 ArrayRef<MCPhysReg> Order = RegClassInfo.getOrder(RC); in findSuitableFreeRegister() local
|
| H A D | LocalStackSlotAllocation.cpp | 59 unsigned Order; member in __anon24034::FrameRef 302 unsigned Order = 0; in insertFrameReferenceRegisters() local
|
| /third_party/lzma/CS/7zip/ |
| H A D | ICoder.cs | 95 Order,
enumerator
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Support/ |
| H A D | DynamicLibrary.cpp | 76 void *LibLookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { in LibLookup() argument 91 void *Lookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { in Lookup() argument
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| H A D | RegisterClassInfo.h | 37 std::unique_ptr<MCPhysReg[]> Order; member
|
| H A D | ScheduleDAG.h | 56 Order ///< Any other ordering dependency. enumerator [all...] |
| /third_party/icu/icu4j/main/classes/core/src/com/ibm/icu/text/ |
| H A D | BidiTransform.java | 56 public enum Order { enum in BidiTransform [all...] |
| /third_party/icu/ohos_icu4j/src/main/java/ohos/global/icu/text/ |
| H A D | BidiTransform.java | 57 public enum Order { enum in BidiTransform [all...] |
| /third_party/lzma/CPP/7zip/UI/Common/ |
| H A D | ZipRegistry.h | 85 UInt32 Order;
member
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SDNodeDbgValue.h | 51 unsigned Order; member in llvm::SDDbgValue 147 unsigned Order; member in llvm::SDDbgLabel 76 SDDbgValue(DIVariable *Var, DIExpression *Expr, unsigned VRegOrFrameIdx, bool IsIndirect, DebugLoc DL, unsigned Order, enum DbgValueKind Kind) SDDbgValue() argument [all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAGHVX.cpp | 126 ArrayRef<Node> Order; member 375 std::vector<ElemType> Order; global() member [all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.h | 1543 X86StoreSDNode(unsigned Opcode, unsigned Order, const DebugLoc &dl, in X86StoreSDNode() argument 1561 X86MaskedStoreSDNode(unsigned Opcode, unsigned Order, in X86MaskedStoreSDNode() argument 1579 TruncSStoreSDNode(unsigned Order, const DebugLoc &dl, in TruncSStoreSDNode() argument 1591 TruncUSStoreSDNode(unsigned Order, const DebugLoc &dl, in TruncUSStoreSDNode() argument 1603 MaskedTruncSStoreSDNode(unsigned Order, in MaskedTruncSStoreSDNode() argument 1616 MaskedTruncUSStoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT, MachineMemOperand *MMO) MaskedTruncUSStoreSDNode() argument 1631 X86MaskedGatherScatterSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT, MachineMemOperand *MMO) X86MaskedGatherScatterSDNode() argument 1649 X86MaskedGatherSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT, MachineMemOperand *MMO) X86MaskedGatherSDNode() argument 1663 X86MaskedScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT, MachineMemOperand *MMO) X86MaskedScatterSDNode() argument [all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 59 static void addHints(ArrayRef<MCPhysReg> Order, in addHints() argument 77 getRegAllocationHints(unsigned VirtReg, ArrayRef<MCPhysReg> Order, SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const getRegAllocationHints() argument
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/BinaryFormat/ |
| H A D | Dwarf.cpp | 419 StringRef llvm::dwarf::ArrayOrderString(unsigned Order) { in ArrayOrderString() argument
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/ |
| H A D | MergeICmps.cpp | 135 unsigned Order = 1; member in __anon25173::BaseIdentifier
|
| H A D | StructurizeCFG.cpp | 197 SmallVector<RegionNode *, 8> Order; member in __anon25201::StructurizeCFG [all...] |
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 301 getRegAllocationHints(unsigned VirtReg, ArrayRef<MCPhysReg> Order, SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const getRegAllocationHints() argument
|
| /third_party/vk-gl-cts/external/vulkancts/modules/vulkan/memory/ |
| H A D | vktMemoryAllocationTests.cpp | 84 enum Order enum
|
| /third_party/vk-gl-cts/external/vulkancts/modules_no_buildgn/vulkan/memory/ |
| H A D | vktMemoryAllocationTests.cpp | 84 enum Order enum
|