| /third_party/skia/src/gpu/ |
| H A D | GrAuditTrail.h | 108 struct OpInfo { struct in GrAuditTrail
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64CollectLOH.cpp | 336 handleMiddleInst(const MachineInstr &MI, LOHInfo &DefInfo, LOHInfo &OpInfo) handleMiddleInst() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | SIMCCodeEmitter.cpp | 216 getLitEncoding(const MCOperand &MO, const MCOperandInfo &OpInfo, const MCSubtargetInfo &STI) const getLitEncoding() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Bitstream/ |
| H A D | BitCodes.h | 183 void Add(const BitCodeAbbrevOp &OpInfo) { in Add() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.h | 596 inline unsigned getOperandSize(const MCOperandInfo &OpInfo) { in getOperandSize() argument
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| /third_party/node/deps/v8/src/diagnostics/ |
| H A D | unwinding-info-win64.cc | 107 unsigned char OpInfo : 4; member
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| /third_party/mesa3d/src/nouveau/codegen/ |
| H A D | nv50_ir_target.h | 193 struct OpInfo struct in nv50_ir::Target
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerInfo.cpp | 482 const MCOperandInfo *OpInfo = MI.getDesc().OpInfo; in getAction() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/pnacl-llvm/include/llvm/Bitcode/NaCl/ |
| H A D | NaClBitCodes.h | 291 void Add(const NaClBitCodeAbbrevOp &OpInfo) { OperandList.push_back(OpInfo); } in Add() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| H A D | MicroMipsSizeReduction.cpp | 65 struct OpInfo { struct
66 OpInfo(enum OperandTransfer TransferOperands) in OpInfo() function
68 OpInfo() : TransferOperands(OT_NA) {} in OpInfo() function
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 199 const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands member in llvm::MCInstrDesc
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 810 const MCOperandInfo &OpInfo = get(Opcode).OpInfo[OpNo]; getOpSize() local
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| H A D | SIFoldOperands.cpp | 435 const MCOperandInfo &OpInfo = InstDesc.OpInfo[OpNo]; in tryAddToFoldList() local
509 const MCOperandInfo *OpInfo = Desc.OpInfo; in tryToFoldACImm() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
| H A D | TargetTransformInfo.cpp | 547 OperandValueKind OpInfo = OK_AnyValue; in getOperandInfo() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 731 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; in AddThumb1SBit() local
747 const MCOperandInfo *OpInfo = ARMInsts[Opcode].OpInfo; in isVectorPredicable() local
825 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; in AddThumbPredicate() local
889 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; UpdateThumbVFPPredicate() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 4261 AsmOperandInfo &OpInfo = ConstraintOperands.back(); in ParseConstraints() local
4095 LowerAsmOutputForConstraint( SDValue &Chain, SDValue &Flag, SDLoc DL, const AsmOperandInfo &OpInfo, SelectionDAG &DAG) const LowerAsmOutputForConstraint() argument
4352 AsmOperandInfo &OpInfo = ConstraintOperands[cIndex]; ParseConstraints() local
4400 AsmOperandInfo &OpInfo = ConstraintOperands[cIndex]; ParseConstraints() local
4540 ChooseConstraint(TargetLowering::AsmOperandInfo &OpInfo, const TargetLowering &TLI, SDValue Op, SelectionDAG *DAG) ChooseConstraint() argument
4597 ComputeConstraintToUse(AsmOperandInfo &OpInfo, SDValue Op, SelectionDAG *DAG) const ComputeConstraintToUse() argument
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| H A D | SelectionDAGBuilder.cpp | 7868 static void patchMatchingInput(const SDISelAsmOperandInfo &OpInfo, in patchMatchingInput() argument
7897 getAddressForMemoryInput(SDValue Chain, const SDLoc &Location, SDISelAsmOperandInfo &OpInfo, SelectionDAG &DAG) getAddressForMemoryInput() argument
7943 GetRegistersForValue(SelectionDAG &DAG, const SDLoc &DL, SDISelAsmOperandInfo &OpInfo, SDISelAsmOperandInfo &RefOpInfo) GetRegistersForValue() argument
8081 update(const TargetLowering::AsmOperandInfo &OpInfo) update() argument
8122 SDISelAsmOperandInfo &OpInfo = ConstraintOperands.back(); visitInlineAsm() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 4509 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i]; in IsOperandAMemoryOperand() local
5156 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i]; in optimizeInlineAsmInst() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 1829 const MCOperandInfo &OpInfo = MCID.OpInfo[NumOp - 1]; in needsExpandMemInst() local
2160 const MCOperandInfo &OpInfo = MCID.OpInfo[i]; in processInstruction() local
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