Searched defs:Cnt (Results 1 - 8 of 8) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Support/ |
| H A D | TrigramIndex.cpp | 35 unsigned Cnt = 0; in insert() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/TextAPI/MachO/ |
| H A D | ArchitectureSet.cpp | 29 size_t Cnt = 0; in count() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXAsmPrinter.cpp | 260 const ConstantFP *Cnt = MO.getFPImm(); in lowerOperand() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | AsmPrinter.cpp | 1323 unsigned Cnt = I.second.second; in emitGlobalGOTEquivs() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 1347 unsigned Cnt = 0; print() local
1349 OS << "Operand " << Cnt++ << "\\n"; print() local
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| /third_party/vixl/src/aarch64/ |
| H A D | macro-assembler-aarch64.h | 4114 void Cnt(const ZRegister& zd, const PRegisterM& pg, const ZRegister& zn) { in Cnt() function in vixl::aarch64::MacroAssembler
7913 void Cnt(const Register& rd, const Register& rn) { in Cnt() function in vixl::aarch64::MacroAssembler
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 8288 static bool getVShiftImm(SDValue Op, unsigned ElementBits, int64_t &Cnt) { in getVShiftImm() argument
8308 static bool isVShiftLImm(SDValue Op, EVT VT, bool isLong, int64_t &Cnt) { in isVShiftLImm() argument
8319 static bool isVShiftRImm(SDValue Op, EVT VT, bool isNarrow, int64_t &Cnt) { in isVShiftRImm() argument
8331 int64_t Cnt; LowerVectorSRA_SRL_SHL() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6037 static bool getVShiftImm(SDValue Op, unsigned ElementBits, int64_t &Cnt) { in getVShiftImm() argument
6058 static bool isVShiftLImm(SDValue Op, EVT VT, bool isLong, int64_t &Cnt) { in isVShiftLImm() argument
6072 isVShiftRImm(SDValue Op, EVT VT, bool isNarrow, bool isIntrinsic, int64_t &Cnt) isVShiftRImm() argument
6091 int64_t Cnt; LowerShift() local
13807 int64_t Cnt; PerformIntrinsicCombine() local
13908 int64_t Cnt; PerformIntrinsicCombine() local
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