CLKID_MPLL0_DIV (definition) in projects: kernel - OpenGrok search results

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Searched defs:CLKID_MPLL0_DIV (Results 1 - 12 of 12) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/meson/
H A D	axg.h	`121 #define CLKID_MPLL0_DIV 65 macro`
H A D	meson8b.h	`80 #define CLKID_MPLL0_DIV 96 macro`
H A D	gxbb.h	`147 #define CLKID_MPLL0_DIV 142 macro`
H A D	g12a.h	`146 #define CLKID_MPLL0_DIV 69 macro`
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A D	axg-clkc.h	`76 #define CLKID_MPLL0_DIV 65 macro`
H A D	gxbb-clkc.h	`150 #define CLKID_MPLL0_DIV 142 macro`
H A D	meson8b-clkc.h	`103 #define CLKID_MPLL0_DIV 96 macro`
H A D	g12a-clkc.h	`80 #define CLKID_MPLL0_DIV 69 macro`
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A D	axg-clkc.h	`76 #define CLKID_MPLL0_DIV 65 macro`
H A D	meson8b-clkc.h	`103 #define CLKID_MPLL0_DIV 96 macro`
H A D	gxbb-clkc.h	`150 #define CLKID_MPLL0_DIV 142 macro`
H A D	g12a-clkc.h	`80 #define CLKID_MPLL0_DIV 69 macro`

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