root { platform { template codec_controller { match_attr = ""; serviceName = ""; codecDaiName = ""; } controller_0x120c1030 :: codec_controller { match_attr = "hdf_codec_driver"; serviceName = "codec_service_0"; codecDaiName = "codec_dai"; idInfo { chipName = "hi3516"; chipIdRegister = 0x113c0000; chipIdSize = 0x1000; } hwInfo = [ /* Playback/Captrue, formats, rates, rate_min, rate_max, channels_min, channels_max, buffer_bytes_max, period_bytes_min, period_bytes_max, periods_min, periods_max */ 1, 0xF, 0xFF, 8000, 96000, 1, 2, 1, 2, 3, 4, 5, 2, 0xF, 0xFF, 8000, 96000, 1, 2, 1, 2, 3, 4, 5, ]; regConfig { /* reg, value */ initSeqConfig = [ 0x14, 0x04000002, 0x18, 0xFD200004, 0x1C, 0x00180018, 0x20, 0x8F8F0028, 0x24, 0x00005C5C, 0x28, 0x00130000, 0x2c, 0x00303E2E, 0x30, 0xFF035AC2, 0x34, 0x08000001, 0x38, 0x06062424, 0x3C, 0x0000C001, 0x14, 0x04000002 ]; /* Mixer reg: register address rreg: register address shift: shift bits rshift: rshift bits min: min value max: max value mask: mask of value invert: enum InvertVal 0-uninvert 1-invert value: value */ ctrlParamsSeqConfig = [ 0x2004, 0x2004, 8, 8, 0x28, 0x7F, 0x7F, 0, 0, //"Main Playback Volume" 0x3c, 0x3c, 24, 24, 0x0, 0x57, 0x7F, 1, 0, //"Main Capture Volume" 0x38, 0x38, 31, 31, 0x0, 0x1, 0x1, 0, 0, //"Playback Mute" 0x3c, 0x3c, 31, 31, 0x0, 0x1, 0x1, 0, 0, //"Capture Mute" 0x20, 0x20, 16, 16, 0x0, 0xF, 0x1F, 0, 0, //"Mic Left Gain" 0x20, 0x20, 24, 24, 0x0, 0xF, 0x1F, 0, 0, //"Mic Right Gain" 0x2000, 0x2000, 16, 16, 0x0, 0x7, 0x7, 0, 0, //"Render Channel Mode" 0x1000, 0x1000, 16, 16, 0x0, 0x7, 0x7, 0, 0 //"Capture Channel Mode" ]; controlsConfig = [ /* "Master Playback Volume", "Master Capture Volume", "Playback Mute", "Capture Mute", "Mic Left Gain", "Mic Right Gain", "External Codec Enable", "Internally Codec Enable", "Render Channel Mode", "Capture Channel Mode" */ /*array index, iface, mixer/mux, enable,*/ 0, 2, 0, 0, 1, 2, 0, 1, 2, 2, 0, 1, 3, 2, 0, 1, 4, 2, 0, 1, 5, 2, 0, 1, 8, 2, 0, 0, 9, 2, 0, 0, ]; /* reg, rreg, shift, rshift, min, max, mask, invert, value */ daiStartupSeqConfig = [ 0x24, 0x24, 11, 11, 0x0, 0x1, 0x1, 0, 0x1 // adc_tune_En09 ]; /* reg, rreg, shift, rshift, min, max, mask, invert, value */ daiParamsSeqConfig = [ 0x30, 0x30, 13, 13, 0x0, 0x1F, 0x1F, 0, 0x0, // i2s_frequency 0x1C, 0x1C, 6, 6, 0x0, 0x3, 0x3, 0, 0x0, // adc_mode_sel 0x30, 0x30, 22, 22, 0x0, 0x3, 0x3, 0, 0x0, // i2s_datawith ]; // Mixer: reg, rreg, shift, rshift, min, max, mask, invert, value ctrlSapmParamsSeqConfig = [ 0x20, 0x20, 23, 23, 0x0, 0x1, 0x1, 0, 0, // LPGA MIC 0 -- connect MIC 0x20, 0x20, 31, 31, 0x0, 0x1, 0x1, 0, 0, // RPGA MIC 0 -- connect MIC 0x30, 0x30, 27, 27, 0x0, 0x1, 0x1, 0, 0, // dacl to dacr mixer 0x30, 0x30, 26, 26, 0x0, 0x1, 0x1, 0, 0 // dacr to dacl mixer ]; /* index = "ADCL", "ADCR", "DACL", "DACR", "LPGA", "RPGA", "SPKL", "SPKR", "MIC"*/ // sapmType, compNameIndex, reg, mask, shift, invert, kcontrolNews, kcontrolsNum sapmComponent = [ 10, 0, 0x20, 0x1, 15, 1, 0, 0, // ADCL 10, 1, 0x20, 0x1, 14, 1, 0, 0, // ADCR 11, 2, 0x14, 0x1, 11, 1, 0, 0, // DACL 11, 3, 0x14, 0x1, 12, 1, 0, 0, // DACR 17, 4, 0x20, 0x1, 13, 1, 1, 1, // LPGA 17, 5, 0x20, 0x1, 12, 1, 2, 1, // RPGA 15, 6, 0xFFFF, 0xFFFF, 0, 0, 0, 0, // SPKL 15, 7, 0xFFFF, 0xFFFF, 0, 0, 0, 0, // SPKR 17, 52, 0xFFFF, 0xFFFF, 0, 0, 3, 1, // SPKL PGA 17, 53, 0xFFFF, 0xFFFF, 0, 0, 4, 1, // SPKR PGA 13, 40, 0xFFFF, 0xFFFF, 0, 0, 0, 0, // MIC1 13, 41, 0xFFFF, 0xFFFF, 0, 0, 0, 0 // MIC2 ]; /* array index, iface, mixer/mux, enable */ sapmConfig = [ 0, 2, 0, 1, 1, 2, 0, 1, 2, 2, 0, 1, 3, 2, 0, 1 ]; } } controller_0x120c1031 :: codec_controller { match_attr = "hdf_codec_driver_ex"; serviceName = "codec_service_1"; codecDaiName = "tfa9879_codec_dai"; regConfig { /* regAddr: register address regValue: config register value mask: mask of value shift: shift bits max: max value min: min value invert: enum Tfa9879InvertVal 0-uninvert 1-invert */ /* reg, value */ /* regAddr, regValue, mask, shift, max, min, invert, opsType */ /* reg, rreg, shift, value, min, max, mask, invert */ resetSeqConfig = [ 0x00, 0x0 ]; hwInfo = [ /* Playback/Captrue, formats, rates, rate_min, rate_max, channels_min, channels_max, buffer_bytes_max, period_bytes_min, period_bytes_max, periods_min, periods_max */ 1, 0xF, 0xFF, 8000, 96000, 1, 2, 1, 2, 3, 4, 5, ]; /* reg, value */ initSeqConfig = [ 0x00, 0x0001, 0x01, 0x0a18, 0x02, 0x0007, 0x03, 0x0a18, 0x04, 0x0007, 0x05, 0x59DD, 0x06, 0xC63E, 0x07, 0x651A, 0x08, 0xE53E, 0x09, 0x4616, 0x0A, 0xD33E, 0x0B, 0x4DF3, 0x0C, 0xEA3E, 0x0D, 0x5EE0, 0x0E, 0xF93E, 0x0F, 0x0008, 0x10, 0x92BA, 0x11, 0x12A5, 0x12, 0x0004, 0x13, 0x1031, 0x14, 0x0000 ]; /* reg: register address rreg: register address shift: shift bits rshift: rshift bits min: min value max: max value mask: mask of value invert: enum InvertVal 0-uninvert 1-invert value: value */ /* reg, rreg, shift, rshift, min, max, mask, invert, value */ ctrlParamsSeqConfig = [ 0x13, 0x13, 0, 0, 0x0, 0xBC, 0xFF, 1, 0x0, // output volume 0x14, 0x14, 9, 9, 0x0, 0x1, 0x1, 0, 0x0, // output mute 0x01, 0x01, 10, 10, 0x0, 0x3, 0x3, 0, 0x0 // output channel ]; /* reg, rreg, shift, rshift, min, max, mask, invert, value */ daiStartupSeqConfig = [ 0x00, 0x00, 0, 0, 0x0, 0xF, 0xF, 0, 0x9 // work ]; /* reg, rreg, shift, rshift, min, max, mask, invert, value */ daiParamsSeqConfig = [ 0x01, 0x01, 6, 6, 0x0, 0xF, 0xF, 0, 0x0, // i2s_frequency 0x01, 0x01, 3, 3, 0x0, 0x7, 0x7, 0, 0x0, // i2s_format 0x01, 0x01, 10, 10, 0x0, 0x3, 0x3, 0, 0x0 // i2s_channel ]; /*array index, iface, mixer/mux, enable,*/ controlsConfig = [ /* "Master Playback Volume", "Playback Mute", "Render Channel Mode" */ 0, 2, 0, 1, 2, 2, 0, 1, 8, 2, 0, 1 ]; } } } }