Lines Matching refs:core
356 bool Equal32(uint32_t expected, const RegisterDump* core, const Register& reg);
358 const RegisterDump* core,
362 const RegisterDump* core,
366 const RegisterDump* core,
369 const RegisterDump* core,
372 const RegisterDump* core,
376 const RegisterDump* core,
381 const RegisterDump* core,
389 bool NotEqual64(T0 reference, const RegisterDump* core, T1 result) {
390 return !Equal64(reference, core, result, kExpectNotEqual);
394 const RegisterDump* core,
399 const RegisterDump* core,
407 const RegisterDump* core,
415 if (!core->HasSVELane(reg, lane)) {
421 core->GetSVELaneCount(kBRegSize));
426 equal = EqualSVELane(expected[N - lane - 1], core, reg, lane) && equal;
434 const RegisterDump* core,
442 for (int lane = 0; lane < core->GetSVELaneCount(reg.GetLaneSizeInBits());
444 equal = EqualSVELane(expected, core, reg, lane) && equal;
452 const RegisterDump* core,
461 return EqualSVE(expected.VnB(), core, result.VnB(), printed_warning);
467 for (int lane = 0; lane < core->GetSVELaneCount(lane_size); ++lane) {
468 uint64_t expected_lane = core->GetSVELane(expected, lane);
469 equal = equal && EqualSVELane(expected_lane, core, result, lane);
592 // sets core, vector, predicate and flag registers, though leaves the stack
598 // covers core (not sp), vector (lower 128 bits), predicate (lower 16 bits)