Lines Matching refs:kPRegMaxSize
124 VIXL_ASSERT((N * p_bits_per_lane) <= kPRegMaxSize);
128 VIXL_STATIC_ASSERT(N <= kPRegMaxSize);
13267 int inputs[kPRegMaxSize] = {0};
13268 VIXL_ASSERT(active_lanes <= kPRegMaxSize);
13272 inputs[kPRegMaxSize - i - 1] = 1;
13289 int active_lanes_inputs[] = {0, 1, 7, 10, 32, 48, kPRegMaxSize};
13302 VIXL_ASSERT(active_lanes <= kPRegMaxSize);
13306 int pd[kPRegMaxSize] = {0};
13308 pd[kPRegMaxSize - i - 1] = 1;
13311 int pg[kPRegMaxSize] = {0};
13313 pg[kPRegMaxSize - i - 1] = pg_inputs[i];
13316 int pd_expected[kPRegMaxSize] = {0};
13318 int lane = kPRegMaxSize - i - 1;
13346 int active_lanes_inputs[] = {0, 1, 15, 26, 39, 47, kPRegMaxSize};
18013 VIXL_ASSERT(M == (kPRegMaxSize / kDRegSize));