Lines Matching refs:kDRegSize
479 TEST_SVE(sve_mla_mls_d) { MlaMlsHelper(config, kDRegSize); }
1670 ASSERT_EQUAL_64(core.GetSVELaneCount(kDRegSize), x24);
1779 ASSERT_EQUAL_64(0x40000000 + core.GetSVELaneCount(kDRegSize), x23);
1910 int d_lane_count = core.GetSVELaneCount(kDRegSize);
2058 int d_lane_count = core.GetSVELaneCount(kDRegSize);
2218 int d_lane_count = core.GetSVELaneCount(kDRegSize);
2279 int d_lane_count = core.GetSVELaneCount(kDRegSize);
2284 uint64_t d_mask = GetUintMask(kDRegSize);
3260 PnextHelper(config, kDRegSize, in0, in0, exp00);
3261 PnextHelper(config, kDRegSize, in1, in0, exp10);
3262 PnextHelper(config, kDRegSize, in2, in0, exp20);
3264 PnextHelper(config, kDRegSize, in0, in1, exp01);
3265 PnextHelper(config, kDRegSize, in1, in1, exp11);
3266 PnextHelper(config, kDRegSize, in2, in1, exp21);
3268 PnextHelper(config, kDRegSize, in0, in2, exp02);
3269 PnextHelper(config, kDRegSize, in1, in2, exp12);
3270 PnextHelper(config, kDRegSize, in2, in2, exp22);
3488 TEST_SVE(sve_ptrue_d) { PtrueHelper(config, kDRegSize, LeaveFlags); }
3493 TEST_SVE(sve_ptrues_d) { PtrueHelper(config, kDRegSize, SetFlags); }
3667 int vl_d = core.GetSVELaneCount(kDRegSize);
3835 CntHelper(config, &MacroAssembler::Cntd, 1, kDRegSize);
3836 CntHelper(config, &MacroAssembler::Cntd, 2, kDRegSize);
3837 CntHelper(config, &MacroAssembler::Cntd, 15, kDRegSize);
3838 CntHelper(config, &MacroAssembler::Cntd, 16, kDRegSize);
3863 DecHelper(config, &MacroAssembler::Decd, 1, kDRegSize, 42);
3864 DecHelper(config, &MacroAssembler::Decd, 2, kDRegSize, -1);
3865 DecHelper(config, &MacroAssembler::Decd, 15, kDRegSize, INT64_MIN);
3866 DecHelper(config, &MacroAssembler::Decd, 16, kDRegSize, -42);
3891 IncHelper(config, &MacroAssembler::Incd, 1, kDRegSize, 42);
3892 IncHelper(config, &MacroAssembler::Incd, 2, kDRegSize, -1);
3893 IncHelper(config, &MacroAssembler::Incd, 15, kDRegSize, INT64_MAX);
3894 IncHelper(config, &MacroAssembler::Incd, 16, kDRegSize, -42);
4013 QDecHelper<int64_t>(config, &MacroAssembler::Sqdecd, 1, kDRegSize, 1);
4014 QDecHelper<int64_t>(config, &MacroAssembler::Sqdecd, 2, kDRegSize, bigneg);
4015 QDecHelper<int64_t>(config, &MacroAssembler::Sqdecd, 15, kDRegSize, 999);
4016 QDecHelper<int64_t>(config, &MacroAssembler::Sqdecd, 16, kDRegSize, bigpos);
4049 QIncHelper<int64_t>(config, &MacroAssembler::Sqincd, 1, kDRegSize, 1);
4050 QIncHelper<int64_t>(config, &MacroAssembler::Sqincd, 2, kDRegSize, bigneg);
4051 QIncHelper<int64_t>(config, &MacroAssembler::Sqincd, 15, kDRegSize, 999);
4052 QIncHelper<int64_t>(config, &MacroAssembler::Sqincd, 16, kDRegSize, bigpos);
4097 QDecHelper<uint32_t>(config, &MacroAssembler::Uqdecd, 1, kDRegSize, 1);
4098 QDecHelper<uint32_t>(config, &MacroAssembler::Uqdecd, 2, kDRegSize, 42);
4099 QDecHelper<uint32_t>(config, &MacroAssembler::Uqdecd, 15, kDRegSize, 999);
4100 QDecHelper<uint32_t>(config, &MacroAssembler::Uqdecd, 16, kDRegSize, big32);
4101 QDecHelper<uint64_t>(config, &MacroAssembler::Uqdecd, 1, kDRegSize, 1);
4102 QDecHelper<uint64_t>(config, &MacroAssembler::Uqdecd, 2, kDRegSize, 42);
4103 QDecHelper<uint64_t>(config, &MacroAssembler::Uqdecd, 15, kDRegSize, 999);
4104 QDecHelper<uint64_t>(config, &MacroAssembler::Uqdecd, 16, kDRegSize, big64);
4149 QIncHelper<uint32_t>(config, &MacroAssembler::Uqincd, 1, kDRegSize, 1);
4150 QIncHelper<uint32_t>(config, &MacroAssembler::Uqincd, 2, kDRegSize, 42);
4151 QIncHelper<uint32_t>(config, &MacroAssembler::Uqincd, 15, kDRegSize, 999);
4152 QIncHelper<uint32_t>(config, &MacroAssembler::Uqincd, 16, kDRegSize, big32);
4153 QIncHelper<uint64_t>(config, &MacroAssembler::Uqincd, 1, kDRegSize, 1);
4154 QIncHelper<uint64_t>(config, &MacroAssembler::Uqincd, 2, kDRegSize, 42);
4155 QIncHelper<uint64_t>(config, &MacroAssembler::Uqincd, 15, kDRegSize, 999);
4156 QIncHelper<uint64_t>(config, &MacroAssembler::Uqincd, 16, kDRegSize, big64);
4289 QDecXWHelper(config, &MacroAssembler::Sqdecd, 1, kDRegSize, 1);
4290 QDecXWHelper(config, &MacroAssembler::Sqdecd, 2, kDRegSize, INT32_MIN + 42);
4291 QDecXWHelper(config, &MacroAssembler::Sqdecd, 15, kDRegSize, 999);
4292 QDecXWHelper(config, &MacroAssembler::Sqdecd, 16, kDRegSize, INT32_MAX - 42);
4317 QIncXWHelper(config, &MacroAssembler::Sqincd, 1, kDRegSize, 1);
4318 QIncXWHelper(config, &MacroAssembler::Sqincd, 2, kDRegSize, INT32_MIN + 42);
4319 QIncXWHelper(config, &MacroAssembler::Sqincd, 15, kDRegSize, 999);
4320 QIncXWHelper(config, &MacroAssembler::Sqincd, 16, kDRegSize, INT32_MAX - 42);
4350 InsrHelper(&masm, ZRegister(i, kDRegSize), acc_inputs);
4430 IncDecZHelper(config, &MacroAssembler::Decd, cntd, sub, mult, kDRegSize);
4433 IncDecZHelper(config, &MacroAssembler::Incd, cntd, add, mult, kDRegSize);
4446 IncDecZHelper(config, &MacroAssembler::Uqdecd, cntd, sub, mult, kDRegSize);
4449 IncDecZHelper(config, &MacroAssembler::Uqincd, cntd, add, mult, kDRegSize);
4462 IncDecZHelper(config, &MacroAssembler::Sqdecd, cntd, sub, mult, kDRegSize);
4465 IncDecZHelper(config, &MacroAssembler::Sqincd, cntd, add, mult, kDRegSize);
4584 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, add_exp_d);
4603 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, sub_exp_d);
4651 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, umax_exp_d);
4667 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, umin_exp_d);
4684 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, uabd_exp_d);
4732 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, smax_exp_d);
4749 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, smin_exp_d);
4765 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, sabd_exp_d);
4813 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, mul_exp_d);
4830 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, umulh_exp_d);
4869 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, exp_d);
4910 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, and_exp_d);
4926 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, bic_exp_d);
4942 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, eor_exp_d);
4958 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, orr_exp_d);
4993 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, exp_d);
5028 IntBinArithHelper(config, fn, kDRegSize, pg_d, zn_d, zm_d, exp_d);
5081 IntArithHelper(config, fn, kDRegSize, in_d, in_d, add_exp_d);
5094 IntArithHelper(config, fn, kDRegSize, in_d, in_d, sqadd_exp_d);
5107 IntArithHelper(config, fn, kDRegSize, in_d, in_d, uqadd_exp_d);
5139 IntArithHelper(config, fn, kDRegSize, ins1_d, ins2_d, ins1_sub_ins2_exp_d);
5150 IntArithHelper(config, fn, kDRegSize, ins2_d, ins1_d, ins2_sub_ins1_exp_d);
5163 IntArithHelper(config, fn, kDRegSize, ins1_d, ins2_d, ins1_sqsub_ins2_exp_d);
5174 IntArithHelper(config, fn, kDRegSize, ins2_d, ins1_d, ins2_sqsub_ins1_exp_d);
5187 IntArithHelper(config, fn, kDRegSize, ins1_d, ins2_d, ins1_uqsub_ins2_exp_d);
5198 IntArithHelper(config, fn, kDRegSize, ins2_d, ins1_d, ins2_uqsub_ins1_exp_d);
5675 lane_count = core.GetSVELaneCount(kDRegSize);
5678 core.zreg_lane(z8.GetCode(), kDRegSize, lane_count - i - 1);
5679 uint64_t input = core.zreg_lane(z9.GetCode(), kDRegSize, i);
5703 lane_count = core.GetSVELaneCount(kDRegSize);
5705 (vl > (index[3] * kDRegSize)) ? 0xfedcba9876543210 : 0;
5710 lane_count = core.GetSVELaneCount(kDRegSize);
5790 lane_count = core.GetSVELaneCount(kDRegSize);
5815 lane_count = core.GetSVELaneCount(kDRegSize);
5838 lane_count = core.GetSVELaneCount(kDRegSize);
5860 lane_count = core.GetSVELaneCount(kDRegSize);
6776 ZRegister ind_d = z3.WithLaneSize(kDRegSize);
6834 uint64_t expected = (vl > (index_d[i] * kDRegSize)) ? z29_expected[i] : 0;
7209 int64_t offset = 22 * static_cast<int>(vl / (kDRegSize / kWRegSize));
8790 Register rt(28, std::min(std::max(esize_in_bits, kSRegSize), kDRegSize));
8891 offs_size = kDRegSize;
8915 (esize_in_bits == kDRegSize) ? UINT64_MAX : UINT32_MAX;
8920 if ((offs_size == kSRegSize) && (esize_in_bits == kDRegSize)) {
9025 ldff1_unscaled_offset_helper(kBRegSize, kDRegSize, ldff1b, ld1b);
9031 ldff1_unscaled_offset_helper(kBRegSize, kDRegSize, ldff1sb, ld1sb);
9048 ldff1_scaled_offset_helper(kHRegSize, kDRegSize, ldff1h, ld1h);
9053 ldff1_scaled_offset_helper(kSRegSize, kDRegSize, ldff1w, ld1w);
9057 ldff1_scaled_offset_helper(kDRegSize, kDRegSize, ldff1d, ld1d);
9062 ldff1_scaled_offset_helper(kHRegSize, kDRegSize, ldff1sh, ld1sh);
9066 ldff1_scaled_offset_helper(kSRegSize, kDRegSize, ldff1sw, ld1sw);
9145 kDRegSize,
9164 ldff1_32_unpacked_scaled_offset_helper(kDRegSize, ldff1d, ld1d, UXTW);
9165 ldff1_32_unpacked_scaled_offset_helper(kDRegSize, ldff1d, ld1d, SXTW);
9185 kDRegSize,
9209 ldff1_32_unpacked_unscaled_offset_helper(kDRegSize, ldff1d, ld1d, UXTW);
9210 ldff1_32_unpacked_unscaled_offset_helper(kDRegSize, ldff1d, ld1d, SXTW);
9234 kDRegSize,
9251 ldff1_64_scaled_offset_helper(kDRegSize, ldff1d, ld1d);
9268 kDRegSize,
9289 ldff1_64_unscaled_offset_helper(kDRegSize, ldff1d, ld1d);
9829 VIXL_ASSERT((esize_in_bits == kSRegSize) || (esize_in_bits == kDRegSize));
9938 VIXL_ASSERT((esize_in_bits == kSRegSize) || (esize_in_bits == kDRegSize));
9962 uint64_t uint_e_max = (esize_in_bits == kDRegSize) ? UINT64_MAX : UINT32_MAX;
9985 if (esize_in_bits == kDRegSize) {
10013 if (esize_in_bits == kDRegSize) {
10026 kDRegSize,
10034 kDRegSize,
10042 kDRegSize,
10049 kDRegSize,
10050 kDRegSize,
10058 kDRegSize,
10066 kDRegSize,
10074 kDRegSize,
10190 kDRegSize,
10209 ld1_32_unpacked_scaled_offset_helper(kDRegSize, ld1d, ldff1d, UXTW, false);
10210 ld1_32_unpacked_scaled_offset_helper(kDRegSize, ld1d, ldff1d, SXTW, false);
10228 kDRegSize,
10247 ld1_32_unpacked_unscaled_offset_helper(kDRegSize, ld1d, ldff1d, UXTW, false);
10248 ld1_32_unpacked_unscaled_offset_helper(kDRegSize, ld1d, ldff1d, SXTW, false);
10266 kDRegSize,
10283 ld1_64_scaled_offset_helper(kDRegSize, ld1d, ldff1d, false);
10299 kDRegSize,
10320 ld1_64_unscaled_offset_helper(kDRegSize, ld1d, ldff1d, false);
10706 if (esize_in_bits == kDRegSize) {
10714 if (esize_in_bits == kDRegSize) {
10740 if (esize_in_bits == kDRegSize) {
10749 sve_st1_scalar_plus_vector_helper(config, kDRegSize, UXTW, false);
10750 sve_st1_scalar_plus_vector_helper(config, kDRegSize, SXTW, false);
10754 sve_st1_scalar_plus_vector_helper(config, kDRegSize, UXTW, true);
10755 sve_st1_scalar_plus_vector_helper(config, kDRegSize, SXTW, true);
10769 sve_st1_scalar_plus_vector_helper(config, kDRegSize, LSL, true);
10773 sve_st1_scalar_plus_vector_helper(config, kDRegSize, NO_SHIFT, false);
10843 IntWideImmHelper(config, fn, kDRegSize, in_d, 99, exp_d_1);
10854 IntWideImmHelper(config, fn, kDRegSize, in_d, INT16_MAX, exp_d_2);
10873 IntWideImmHelper(config, fn, kDRegSize, in_d, 99, exp_d_1);
10884 IntWideImmHelper(config, fn, kDRegSize, in_d, INT16_MAX, exp_d_2);
10903 IntWideImmHelper(config, fn, kDRegSize, in_d, 99, exp_d_1);
10914 IntWideImmHelper(config, fn, kDRegSize, in_d, INT16_MAX, exp_d_2);
10933 IntWideImmHelper(config, fn, kDRegSize, in_d, 99, exp_d_1);
10944 IntWideImmHelper(config, fn, kDRegSize, in_d, INT16_MAX, exp_d_2);
10963 IntWideImmHelper(config, fn, kDRegSize, in_d, 2, exp_d_1);
10974 IntWideImmHelper(config, fn, kDRegSize, in_d, 200, exp_d_2);
10999 IntWideImmHelper(config, fn, kDRegSize, in_d, 0xff, exp_d_1);
11009 IntWideImmHelper(config, fn, kDRegSize, in_d, 0xff << 8, exp_d_2);
11025 IntWideImmHelper(config, fn, kDRegSize, in_d, -1, exp_d_4);
11046 IntWideImmHelper(config, fn, kDRegSize, in_d, 255, exp_d_1);
11056 IntWideImmHelper(config, fn, kDRegSize, in_d, 0xff << 8, exp_d_2);
11076 IntWideImmHelper(config, fn, kDRegSize, in_d, 0xff, exp_d_1);
11086 IntWideImmHelper(config, fn, kDRegSize, in_d, 0xff << 8, exp_d_2);
11106 IntWideImmHelper(config, fn, kDRegSize, in_d, 0xff, exp_d_1);
11116 IntWideImmHelper(config, fn, kDRegSize, in_d, 0xff << 8, exp_d_2);
11132 IntWideImmHelper(config, fn, kDRegSize, in_d, -1, exp_d_4);
11153 IntWideImmHelper(config, fn, kDRegSize, in_d, 255, exp_d_1);
11163 IntWideImmHelper(config, fn, kDRegSize, in_d, 0xff << 8, exp_d_2);
11183 IntWideImmHelper(config, fn, kDRegSize, in_d, 0xff, exp_d_1);
11193 IntWideImmHelper(config, fn, kDRegSize, in_d, 0xff << 8, exp_d_2);
11378 for (int i = 1; i < core.GetSVELaneCount(kDRegSize); i++) {
11452 for (int i = 1; i < core.GetSVELaneCount(kDRegSize); i++) {
11524 for (int i = 1; i < core.GetSVELaneCount(kDRegSize); i++) {
11596 for (int i = 1; i < core.GetSVELaneCount(kDRegSize); i++) {
11730 kDRegSize,
11769 kDRegSize,
11821 constexpr int d = kQRegSize / kDRegSize;
11832 kDRegSize,
11885 constexpr int d = kQRegSize / kDRegSize;
11895 kDRegSize,
12175 FPBinArithHelper(config, fn, kDRegSize, zn_inputs, zm_inputs, expected_d);
12219 FPBinArithHelper(config, fn, kDRegSize, zn_inputs, zm_inputs, expected_d);
12263 FPBinArithHelper(config, fn, kDRegSize, zn_inputs, zm_inputs, expected_d);
12454 kDRegSize,
12657 kDRegSize,
12675 kDRegSize,
12767 BitwiseShiftImmHelper(config, kDRegSize, inputs_d, shift_d[i]);
12809 ZRegister zm = z28.WithLaneSize(kDRegSize);
12816 ZRegister zm_max_shift_amount = z25.WithLaneSize(kDRegSize);
12822 ZRegister zm_out_of_range = z23.WithLaneSize(kDRegSize);
14818 for (size_t i = 0; i < (kZRegMaxSize / kDRegSize); i++) {
15120 BasicFPArithHelper(&masm, kDRegSize, inputs, inputs_fmulx, inputs_nans);
15554 kDRegSize,
15562 kDRegSize,
15664 kDRegSize,
15672 kDRegSize,
15757 kDRegSize,
15765 kDRegSize,
15811 kDRegSize,
15812 kDRegSize,
15819 kDRegSize,
15820 kDRegSize,
15884 unsigned lane_sizes[] = {kHRegSize, kSRegSize, kDRegSize};
15960 case kDRegSize:
16024 TestUScvtfHelper(config, kHRegSize, kDRegSize, pg_1, data_set_1);
16117 int src_lane_size = kDRegSize;
16176 int dst_lane_size = kDRegSize;
16177 int src_lane_size = kDRegSize;
16235 int dst_lane_size = kDRegSize;
16772 kDRegSize,
16823 kDRegSize,
16874 kDRegSize,
16925 kDRegSize,
16952 for (size_t i = 0; i < (kZRegMaxSize / kDRegSize); i += N) {
17250 kDRegSize,
17262 kDRegSize,
17273 kDRegSize,
17296 kDRegSize,
17328 kDRegSize,
17361 kDRegSize,
17885 int lane_sizes[] = {kHRegSize, kSRegSize, kDRegSize};
17973 TestFpCompareZeroHelper(config, kDRegSize, gt, zn_inputs_d, pd_expected_gt);
17974 TestFpCompareZeroHelper(config, kDRegSize, lt, zn_inputs_d, pd_expected_lt);
17975 TestFpCompareZeroHelper(config, kDRegSize, ge, zn_inputs_d, pd_expected_ge);
17976 TestFpCompareZeroHelper(config, kDRegSize, le, zn_inputs_d, pd_expected_le);
17977 TestFpCompareZeroHelper(config, kDRegSize, eq, zn_inputs_d, pd_expected_eq);
17978 TestFpCompareZeroHelper(config, kDRegSize, ne, zn_inputs_d, pd_expected_ne);
18013 VIXL_ASSERT(M == (kPRegMaxSize / kDRegSize));
18183 TestFcvtHelper(config, kSRegSize, kDRegSize, s_vals, d_vals);
18184 TestFcvtHelper(config, kDRegSize, kSRegSize, d_vals, s_vals);
18185 TestFcvtHelper(config, kHRegSize, kDRegSize, h_vals, d_vals);
18186 TestFcvtHelper(config, kDRegSize, kHRegSize, d_vals, h_vals);
18213 TestFcvtHelper(config, kHRegSize, kDRegSize, h_inputs, h2d_expected);
18214 TestFcvtHelper(config, kDRegSize, kHRegSize, d_inputs, d2h_expected);
18215 TestFcvtHelper(config, kSRegSize, kDRegSize, s_inputs, s2d_expected);
18216 TestFcvtHelper(config, kDRegSize, kSRegSize, d_inputs, d2s_expected);
18319 TestFrecpxHelper(config, kDRegSize, zn_inputs, zd_expected);
18425 TestFsqrtHelper(config, kDRegSize, zn_inputs, zd_expected);
18501 (esize_in_bits == kSRegSize) || (esize_in_bits == kDRegSize));
18593 LoadBcastHelper(config, kBRegSize, kDRegSize, &MacroAssembler::Ld1rb, false);
18599 LoadBcastHelper(config, kHRegSize, kDRegSize, &MacroAssembler::Ld1rh, false);
18604 LoadBcastHelper(config, kSRegSize, kDRegSize, &MacroAssembler::Ld1rw, false);
18608 LoadBcastHelper(config, kDRegSize, kDRegSize, &MacroAssembler::Ld1rd, false);
18614 LoadBcastHelper(config, kBRegSize, kDRegSize, &MacroAssembler::Ld1rsb, true);
18619 LoadBcastHelper(config, kHRegSize, kDRegSize, &MacroAssembler::Ld1rsh, true);
18623 LoadBcastHelper(config, kSRegSize, kDRegSize, &MacroAssembler::Ld1rsw, true);