Lines Matching defs:Initialise
57 // Initialise(&masm, p0, 0x1234); // Sets p0 = 0b'0001'0010'0011'0100
58 void Initialise(MacroAssembler* masm,
83 void Initialise(MacroAssembler* masm,
88 Initialise(masm, pd, 0, value2, value1, value0);
90 void Initialise(MacroAssembler* masm,
94 Initialise(masm, pd, 0, 0, value1, value0);
96 void Initialise(MacroAssembler* masm, const PRegister& pd, uint64_t value0) {
97 Initialise(masm, pd, 0, 0, 0, value0);
106 // Initialise(&masm, p0.VnS(), values); // Sets p0 = 0b'0000'0001'0010
115 void Initialise(MacroAssembler* masm,
137 Initialise(masm, pd, chunks[3], chunks[2], chunks[1], chunks[0]);
204 Initialise(&masm, p0.VnB(), p0_inputs);
207 Initialise(&masm, p1.VnH(), p1_inputs);
210 Initialise(&masm, p2.VnS(), p2_inputs);
213 Initialise(&masm, p3.VnD(), p3_inputs);
221 Initialise(&masm, p4.VnH(), p4_inputs);
225 Initialise(&masm, p5.VnS(), p5_inputs);
229 Initialise(&masm, p6.VnD(), p6_inputs);
236 Initialise(&masm, p7.VnD(), p7_inputs);
395 Initialise(&masm, p0.WithLaneSize(lane_size_in_bits), p0_inputs);
396 Initialise(&masm, p1.WithLaneSize(lane_size_in_bits), p1_inputs);
397 Initialise(&masm, p2.WithLaneSize(lane_size_in_bits), p2_inputs);
398 Initialise(&masm, p3.WithLaneSize(lane_size_in_bits), p3_inputs);
518 Initialise(&masm, p2.VnB(), p2_inputs);
519 Initialise(&masm, p3.VnB(), p3_inputs);
602 Initialise(&masm, p2.VnB(), p2_inputs);
603 Initialise(&masm, p3.VnB(), p3_inputs);
686 Initialise(&masm, p2.VnB(), p2_inputs);
687 Initialise(&masm, p3.VnB(), p3_inputs);
764 Initialise(&masm, p2.VnB(), p2_inputs);
765 Initialise(&masm, p3.VnB(), p3_inputs);
842 Initialise(&masm, p2.VnB(), p2_inputs);
843 Initialise(&masm, p3.VnB(), p3_inputs);
982 Initialise(&masm, p2.VnB(), p2b_inputs);
983 Initialise(&masm, p3.VnB(), p3b_inputs);
984 Initialise(&masm, p4.VnB(), p4b_inputs);
985 Initialise(&masm, p5.VnB(), p5b_inputs);
986 Initialise(&masm, p6.VnB(), p6b_inputs);
1007 Initialise(&masm, p2.VnH(), p2h_inputs);
1008 Initialise(&masm, p3.VnH(), p3h_inputs);
1017 Initialise(&masm, p2.VnS(), p2s_inputs);
1018 Initialise(&masm, p3.VnS(), p3s_inputs);
1027 Initialise(&masm, p2.VnD(), p2d_inputs);
1028 Initialise(&masm, p3.VnD(), p3d_inputs);
1080 Initialise(&masm, p10.VnB(), p10_inputs);
1081 Initialise(&masm, p11.VnB(), p11_inputs);
1082 Initialise(&masm, p12.VnB(), p12_inputs);
1140 Initialise(&masm, p0.VnB(), p0_inputs);
1150 Initialise(&masm, p1.VnD(), p1_inputs);
1161 Initialise(&masm, p2.VnH(), p2_inputs);
1174 Initialise(&masm, p3.VnS(), p3_inputs);
1237 Initialise(&masm, p0.VnB(), mask_inputs_1);
1249 Initialise(&masm, p0.VnH(), mask_inputs_2);
1261 Initialise(&masm, p0.VnS(), mask_inputs_3);
1273 Initialise(&masm, p0.VnB(), mask_inputs_4);
1285 Initialise(&masm, p0.VnS(), mask_inputs_5);
1511 Initialise(&masm, p0.VnB(), p0_inputs);
1566 Initialise(&masm, p0.VnB(), p0_inputs);
1679 Initialise(&masm, p0.VnB(), p0_inputs);
1789 Initialise(&masm, p0.VnB(), p0_inputs);
1937 Initialise(&masm, p0.VnB(), p0_inputs);
2085 Initialise(&masm, p0.VnB(), p0_inputs);
2513 Initialise(&masm, p0.VnB(), mask_inputs1);
2522 Initialise(&masm, p0.VnH(), mask_inputs2);
2531 Initialise(&masm, p0.VnS(), mask_inputs3);
2544 Initialise(&masm, p0.VnD(), mask_inputs4);
2611 Initialise(&masm, p0.VnB(), mask_inputs1);
2620 Initialise(&masm, p0.VnH(), mask_inputs2);
2629 Initialise(&masm, p0.VnS(), mask_inputs3);
2638 Initialise(&masm, p0.VnD(), mask_inputs4);
2687 // Initialise Z and C. These are preserved by cterm*, and the V flag is set to
2776 Initialise(&masm, pg.WithLaneSize(lane_size_in_bits), pg_inputs);
2777 Initialise(&masm, pn.WithLaneSize(lane_size_in_bits), pn_inputs);
2779 // Initialise NZCV to an impossible value, to check that we actually write it.
2942 Initialise(&masm, p0.VnB(), in_b);
2943 Initialise(&masm, p1.VnH(), in_h);
2944 Initialise(&masm, p2.VnS(), in_s);
2945 Initialise(&masm, p3.VnD(), in_d);
2947 // Initialise NZCV to an impossible value, to check that we actually write it.
3283 Initialise(&masm, p0.VnB(), in_b);
3284 Initialise(&masm, p1.VnH(), in_h);
3285 Initialise(&masm, p2.VnS(), in_s);
3286 Initialise(&masm, p3.VnD(), in_d);
3288 // Initialise NZCV to an impossible value, to check that we actually write it.
3337 // Initialise NZCV to an impossible value, to check that we actually write it.
3499 // Initialise non-zero inputs.
3528 // Initialise NZCV to a known (impossible) value.
3539 Initialise(&masm, p2.VnB(), in2);
3540 Initialise(&masm, p3.VnB(), in3);
3541 Initialise(&masm, p4.VnB(), in4);
3629 Initialise(&masm, p0.VnB(), p0_inputs);
3702 // Initialise accumulators.
4173 // Initialise accumulators.
4490 Initialise(&masm, p0.WithLaneSize(lane_size_in_bits), pg_inputs);
5595 // Initialise registers with known values first.
5883 Initialise(&masm, p0.VnB(), pg_in);
5991 Initialise(&masm, p0.VnB(), pg_in);
6079 Initialise(&masm, p0.VnB(), pg_in);
6161 Initialise(&masm, p0.VnB(), pg_in);
6247 Initialise(&masm, p0.VnB(), pg_in);
6330 Initialise(&masm, p0.VnB(), pg_in);
6419 Initialise(&masm, pg.VnB(), pg_in);
6526 Initialise(&masm, pg.VnB(), pg_in);
6633 Initialise(&masm, pg.VnB(), pg_in);
6952 // Initialise p8-p15 with a conveniently-recognisable, non-zero pattern.
6953 Initialise(&masm,
7269 Initialise(&masm,
7437 Initialise(&masm,
7653 Initialise(&masm,
7844 Initialise(&masm,
8091 Initialise(&masm,
8326 Initialise(&masm,
9875 Initialise(&masm,
9976 Initialise(&masm,
11320 Initialise(&masm, p0.VnB(), pg_in);
11408 Initialise(&masm, p0.VnB(), pg_in);
11477 Initialise(&masm, p0.VnB(), pg_in);
11549 Initialise(&masm, p0.VnB(), pg_in);
12313 Initialise(&masm, pg, pg_inputs);
12474 Initialise(&masm, p0.VnB(), pg_in);
13275 Initialise(&masm, p1.VnB(), inputs);
13322 Initialise(&masm, p0.VnB(), pg);
13323 Initialise(&masm, p1.VnB(), pd);
13382 Initialise(&masm, pg.VnB(), pg_inputs);
13383 Initialise(&masm, pn.VnB(), pn_inputs);
13384 Initialise(&masm, pm.VnB(), pm_inputs);
13386 // Initialise NZCV to an impossible value, to check that we actually write it.
13595 Initialise(&masm, p2.VnB(), pred);
13641 Initialise(&masm, p2.VnB(), pred);
13753 Initialise(&masm,
13785 Initialise(&masm, p0.VnB(), 0xa5a55a5a);
13842 Initialise(&masm, p0.VnB(), 0x55a55aaa);
13899 Initialise(&masm,
13961 Initialise(&masm,
14023 Initialise(&masm,
14076 Initialise(&masm,
14130 Initialise(&masm, pg.VnB(), pg_inputs);
14131 Initialise(&masm, pn.VnB(), pn_inputs);
14132 Initialise(&masm, pd_m.VnB(), pd_inputs);
14134 // Initialise NZCV to an impossible value, to check that we actually write it.
14328 Initialise(&masm, pg.VnB(), pg_inputs);
14329 Initialise(&masm, pn.VnB(), pn_inputs);
14330 Initialise(&masm, pm.VnB(), pm_inputs);
14331 Initialise(&masm, pdm.VnB(), pm_inputs);
14332 Initialise(&masm, pd.VnB(), pd_inputs);
14333 Initialise(&masm, pd_s.VnB(), pd_inputs);
14335 // Initialise NZCV to an impossible value, to check that we actually write it.
14995 Initialise(masm, p2.VnB(), pred);
15150 Initialise(&masm, p0.VnB(), pred);
15297 Initialise(&masm, p1.VnB(), pred);
15390 Initialise(&masm, pg_merging, pg_inputs);
15402 Initialise(&masm, pg_zeroing, pg_inputs);
15950 Initialise(&masm, pg_merged, pg_inputs);
16678 Initialise(&masm, p0.WithLaneSize(lane_size_in_bits), pg_inputs);
17807 Initialise(&masm, p0.WithLaneSize(lane_size_in_bits), pg_inputs);
18042 Initialise(&masm,
18531 Initialise(&masm,
19490 // Initialise inputs for za.