Lines Matching refs:fbits
4594 // value. All possible values of 'fbits' are tested. The expected value is
4645 // Test all possible values of fbits.
4646 for (int fbits = 1; fbits <= 32; fbits++) {
4647 __ Scvtf(d0, x10, fbits);
4648 __ Ucvtf(d1, x10, fbits);
4649 __ Scvtf(d2, w11, fbits);
4650 __ Ucvtf(d3, w11, fbits);
4651 __ Str(d0, MemOperand(x0, fbits * kDRegSizeInBytes));
4652 __ Str(d1, MemOperand(x1, fbits * kDRegSizeInBytes));
4653 __ Str(d2, MemOperand(x2, fbits * kDRegSizeInBytes));
4654 __ Str(d3, MemOperand(x3, fbits * kDRegSizeInBytes));
4657 // Conversions from W registers can only handle fbits values <= 32, so just
4658 // test conversions from X registers for 32 < fbits <= 64.
4659 for (int fbits = 33; fbits <= 64; fbits++) {
4660 __ Scvtf(d0, x10, fbits);
4661 __ Ucvtf(d1, x10, fbits);
4662 __ Str(d0, MemOperand(x0, fbits * kDRegSizeInBytes));
4663 __ Str(d1, MemOperand(x1, fbits * kDRegSizeInBytes));
4674 for (int fbits = 0; fbits <= 32; fbits++) {
4675 double expected_scvtf = expected_scvtf_base / std::pow(2, fbits);
4676 double expected_ucvtf = expected_ucvtf_base / std::pow(2, fbits);
4677 ASSERT_EQUAL_FP64(expected_scvtf, results_scvtf_x[fbits]);
4678 ASSERT_EQUAL_FP64(expected_ucvtf, results_ucvtf_x[fbits]);
4679 if (cvtf_s32) ASSERT_EQUAL_FP64(expected_scvtf, results_scvtf_w[fbits]);
4680 if (cvtf_u32) ASSERT_EQUAL_FP64(expected_ucvtf, results_ucvtf_w[fbits]);
4682 for (int fbits = 33; fbits <= 64; fbits++) {
4683 double expected_scvtf = expected_scvtf_base / std::pow(2, fbits);
4684 double expected_ucvtf = expected_ucvtf_base / std::pow(2, fbits);
4685 ASSERT_EQUAL_FP64(expected_scvtf, results_scvtf_x[fbits]);
4686 ASSERT_EQUAL_FP64(expected_ucvtf, results_ucvtf_x[fbits]);
4800 // Test all possible values of fbits.
4801 for (int fbits = 1; fbits <= 32; fbits++) {
4802 __ Scvtf(s0, x10, fbits);
4803 __ Ucvtf(s1, x10, fbits);
4804 __ Scvtf(s2, w11, fbits);
4805 __ Ucvtf(s3, w11, fbits);
4806 __ Str(s0, MemOperand(x0, fbits * kSRegSizeInBytes));
4807 __ Str(s1, MemOperand(x1, fbits * kSRegSizeInBytes));
4808 __ Str(s2, MemOperand(x2, fbits * kSRegSizeInBytes));
4809 __ Str(s3, MemOperand(x3, fbits * kSRegSizeInBytes));
4812 // Conversions from W registers can only handle fbits values <= 32, so just
4813 // test conversions from X registers for 32 < fbits <= 64.
4814 for (int fbits = 33; fbits <= 64; fbits++) {
4815 __ Scvtf(s0, x10, fbits);
4816 __ Ucvtf(s1, x10, fbits);
4817 __ Str(s0, MemOperand(x0, fbits * kSRegSizeInBytes));
4818 __ Str(s1, MemOperand(x1, fbits * kSRegSizeInBytes));
4829 for (int fbits = 0; fbits <= 32; fbits++) {
4830 float expected_scvtf = expected_scvtf_base / std::pow(2.0f, fbits);
4831 float expected_ucvtf = expected_ucvtf_base / std::pow(2.0f, fbits);
4832 ASSERT_EQUAL_FP32(expected_scvtf, results_scvtf_x[fbits]);
4833 ASSERT_EQUAL_FP32(expected_ucvtf, results_ucvtf_x[fbits]);
4834 if (cvtf_s32) ASSERT_EQUAL_FP32(expected_scvtf, results_scvtf_w[fbits]);
4835 if (cvtf_u32) ASSERT_EQUAL_FP32(expected_ucvtf, results_ucvtf_w[fbits]);
4837 for (int fbits = 33; fbits <= 64; fbits++) {
4838 float expected_scvtf = expected_scvtf_base / std::pow(2.0f, fbits);
4839 float expected_ucvtf = expected_ucvtf_base / std::pow(2.0f, fbits);
4840 ASSERT_EQUAL_FP32(expected_scvtf, results_scvtf_x[fbits]);
4841 ASSERT_EQUAL_FP32(expected_ucvtf, results_ucvtf_x[fbits]);