Lines Matching refs:VIXL_CHECK
133 VIXL_CHECK(saved_xregs[0] == simulator.ReadXRegister(19)); \
134 VIXL_CHECK(saved_xregs[1] == simulator.ReadXRegister(20)); \
135 VIXL_CHECK(saved_xregs[2] == simulator.ReadXRegister(21)); \
136 VIXL_CHECK(saved_xregs[3] == simulator.ReadXRegister(22)); \
137 VIXL_CHECK(saved_xregs[4] == simulator.ReadXRegister(23)); \
138 VIXL_CHECK(saved_xregs[5] == simulator.ReadXRegister(24)); \
139 VIXL_CHECK(saved_xregs[6] == simulator.ReadXRegister(25)); \
140 VIXL_CHECK(saved_xregs[7] == simulator.ReadXRegister(26)); \
141 VIXL_CHECK(saved_xregs[8] == simulator.ReadXRegister(27)); \
142 VIXL_CHECK(saved_xregs[9] == simulator.ReadXRegister(28)); \
143 VIXL_CHECK(saved_xregs[10] == simulator.ReadXRegister(29)); \
144 VIXL_CHECK(saved_xregs[11] == simulator.ReadXRegister(30)); \
145 VIXL_CHECK(saved_xregs[12] == simulator.ReadXRegister(31)); \
147 VIXL_CHECK(saved_dregs[0] == simulator.ReadDRegisterBits(8)); \
148 VIXL_CHECK(saved_dregs[1] == simulator.ReadDRegisterBits(9)); \
149 VIXL_CHECK(saved_dregs[2] == simulator.ReadDRegisterBits(10)); \
150 VIXL_CHECK(saved_dregs[3] == simulator.ReadDRegisterBits(11)); \
151 VIXL_CHECK(saved_dregs[4] == simulator.ReadDRegisterBits(12)); \
152 VIXL_CHECK(saved_dregs[5] == simulator.ReadDRegisterBits(13)); \
153 VIXL_CHECK(saved_dregs[6] == simulator.ReadDRegisterBits(14)); \
154 VIXL_CHECK(saved_dregs[7] == simulator.ReadDRegisterBits(15)); \
193 VIXL_CHECK(static_cast<uint64_t>(regs.xreg(0)) == FactorialC(N)); \
218 VIXL_CHECK(static_cast<uint64_t>(regs.xreg(0)) == FactorialC(N)); \
298 VIXL_CHECK(output[i] == expected[i]);
338 VIXL_CHECK(A[i] == D[i]);
349 VIXL_CHECK(regs.dreg(0) == Add3DoubleC(A, B, C)); \
375 VIXL_CHECK(regs.dreg(0) == Add4DoubleC(A, B, C, D)); \
401 VIXL_CHECK(regs.xreg(0) == SumArrayC(Array, ARRAY_SIZE(Array))); \
429 VIXL_CHECK(regs.xreg(0) == abs(X)); \
462 VIXL_CHECK(regs.xreg(0) == chksum);
484 VIXL_CHECK(regs.xreg(0) == d);
485 VIXL_CHECK(regs.xreg(1) == c);
486 VIXL_CHECK(regs.xreg(2) == b);
487 VIXL_CHECK(regs.xreg(3) == a);
504 VIXL_CHECK(regs.wreg(0) == y);
505 VIXL_CHECK(regs.wreg(1) == x);
516 VIXL_CHECK(regs.xreg(0) == ((Low <= Value) && (Value <= High))); \
544 VIXL_CHECK(regs.xreg(0) == (Value & 0x1122334455667788)); \
579 VIXL_CHECK(res_orig == -res_mod);
602 VIXL_CHECK(regs.wreg(0) == RUNTIME_CALLS_EXPECTED(A, B)); \
647 VIXL_CHECK(static_cast<size_t>(regs.xreg(0)) == strlen(inputs[i]));