xref: /third_party/vixl/test/aarch32/traces/assembler-cond-rd-operand-rn-identical-low-registers-in-it-block-mvn-t32.h

38   0x08, 0xbf, 0xc0, 0x43 // It eq; mvn eq r0 r0
41   0x08, 0xbf, 0xc9, 0x43 // It eq; mvn eq r1 r1
44   0x08, 0xbf, 0xd2, 0x43 // It eq; mvn eq r2 r2
47   0x08, 0xbf, 0xdb, 0x43 // It eq; mvn eq r3 r3
50   0x08, 0xbf, 0xe4, 0x43 // It eq; mvn eq r4 r4
53   0x08, 0xbf, 0xed, 0x43 // It eq; mvn eq r5 r5
56   0x08, 0xbf, 0xf6, 0x43 // It eq; mvn eq r6 r6
59   0x08, 0xbf, 0xff, 0x43 // It eq; mvn eq r7 r7
62   0x18, 0xbf, 0xc0, 0x43 // It ne; mvn ne r0 r0
65   0x18, 0xbf, 0xc9, 0x43 // It ne; mvn ne r1 r1
68   0x18, 0xbf, 0xd2, 0x43 // It ne; mvn ne r2 r2
71   0x18, 0xbf, 0xdb, 0x43 // It ne; mvn ne r3 r3
74   0x18, 0xbf, 0xe4, 0x43 // It ne; mvn ne r4 r4
77   0x18, 0xbf, 0xed, 0x43 // It ne; mvn ne r5 r5
80   0x18, 0xbf, 0xf6, 0x43 // It ne; mvn ne r6 r6
83   0x18, 0xbf, 0xff, 0x43 // It ne; mvn ne r7 r7
86   0x28, 0xbf, 0xc0, 0x43 // It cs; mvn cs r0 r0
89   0x28, 0xbf, 0xc9, 0x43 // It cs; mvn cs r1 r1
92   0x28, 0xbf, 0xd2, 0x43 // It cs; mvn cs r2 r2
95   0x28, 0xbf, 0xdb, 0x43 // It cs; mvn cs r3 r3
98   0x28, 0xbf, 0xe4, 0x43 // It cs; mvn cs r4 r4
101   0x28, 0xbf, 0xed, 0x43 // It cs; mvn cs r5 r5
104   0x28, 0xbf, 0xf6, 0x43 // It cs; mvn cs r6 r6
107   0x28, 0xbf, 0xff, 0x43 // It cs; mvn cs r7 r7
110   0x38, 0xbf, 0xc0, 0x43 // It cc; mvn cc r0 r0
113   0x38, 0xbf, 0xc9, 0x43 // It cc; mvn cc r1 r1
116   0x38, 0xbf, 0xd2, 0x43 // It cc; mvn cc r2 r2
119   0x38, 0xbf, 0xdb, 0x43 // It cc; mvn cc r3 r3
122   0x38, 0xbf, 0xe4, 0x43 // It cc; mvn cc r4 r4
125   0x38, 0xbf, 0xed, 0x43 // It cc; mvn cc r5 r5
128   0x38, 0xbf, 0xf6, 0x43 // It cc; mvn cc r6 r6
131   0x38, 0xbf, 0xff, 0x43 // It cc; mvn cc r7 r7
134   0x48, 0xbf, 0xc0, 0x43 // It mi; mvn mi r0 r0
137   0x48, 0xbf, 0xc9, 0x43 // It mi; mvn mi r1 r1
140   0x48, 0xbf, 0xd2, 0x43 // It mi; mvn mi r2 r2
143   0x48, 0xbf, 0xdb, 0x43 // It mi; mvn mi r3 r3
146   0x48, 0xbf, 0xe4, 0x43 // It mi; mvn mi r4 r4
149   0x48, 0xbf, 0xed, 0x43 // It mi; mvn mi r5 r5
152   0x48, 0xbf, 0xf6, 0x43 // It mi; mvn mi r6 r6
155   0x48, 0xbf, 0xff, 0x43 // It mi; mvn mi r7 r7
158   0x58, 0xbf, 0xc0, 0x43 // It pl; mvn pl r0 r0
161   0x58, 0xbf, 0xc9, 0x43 // It pl; mvn pl r1 r1
164   0x58, 0xbf, 0xd2, 0x43 // It pl; mvn pl r2 r2
167   0x58, 0xbf, 0xdb, 0x43 // It pl; mvn pl r3 r3
170   0x58, 0xbf, 0xe4, 0x43 // It pl; mvn pl r4 r4
173   0x58, 0xbf, 0xed, 0x43 // It pl; mvn pl r5 r5
176   0x58, 0xbf, 0xf6, 0x43 // It pl; mvn pl r6 r6
179   0x58, 0xbf, 0xff, 0x43 // It pl; mvn pl r7 r7
182   0x68, 0xbf, 0xc0, 0x43 // It vs; mvn vs r0 r0
185   0x68, 0xbf, 0xc9, 0x43 // It vs; mvn vs r1 r1
188   0x68, 0xbf, 0xd2, 0x43 // It vs; mvn vs r2 r2
191   0x68, 0xbf, 0xdb, 0x43 // It vs; mvn vs r3 r3
194   0x68, 0xbf, 0xe4, 0x43 // It vs; mvn vs r4 r4
197   0x68, 0xbf, 0xed, 0x43 // It vs; mvn vs r5 r5
200   0x68, 0xbf, 0xf6, 0x43 // It vs; mvn vs r6 r6
203   0x68, 0xbf, 0xff, 0x43 // It vs; mvn vs r7 r7
206   0x78, 0xbf, 0xc0, 0x43 // It vc; mvn vc r0 r0
209   0x78, 0xbf, 0xc9, 0x43 // It vc; mvn vc r1 r1
212   0x78, 0xbf, 0xd2, 0x43 // It vc; mvn vc r2 r2
215   0x78, 0xbf, 0xdb, 0x43 // It vc; mvn vc r3 r3
218   0x78, 0xbf, 0xe4, 0x43 // It vc; mvn vc r4 r4
221   0x78, 0xbf, 0xed, 0x43 // It vc; mvn vc r5 r5
224   0x78, 0xbf, 0xf6, 0x43 // It vc; mvn vc r6 r6
227   0x78, 0xbf, 0xff, 0x43 // It vc; mvn vc r7 r7
230   0x88, 0xbf, 0xc0, 0x43 // It hi; mvn hi r0 r0
233   0x88, 0xbf, 0xc9, 0x43 // It hi; mvn hi r1 r1
236   0x88, 0xbf, 0xd2, 0x43 // It hi; mvn hi r2 r2
239   0x88, 0xbf, 0xdb, 0x43 // It hi; mvn hi r3 r3
242   0x88, 0xbf, 0xe4, 0x43 // It hi; mvn hi r4 r4
245   0x88, 0xbf, 0xed, 0x43 // It hi; mvn hi r5 r5
248   0x88, 0xbf, 0xf6, 0x43 // It hi; mvn hi r6 r6
251   0x88, 0xbf, 0xff, 0x43 // It hi; mvn hi r7 r7
254   0x98, 0xbf, 0xc0, 0x43 // It ls; mvn ls r0 r0
257   0x98, 0xbf, 0xc9, 0x43 // It ls; mvn ls r1 r1
260   0x98, 0xbf, 0xd2, 0x43 // It ls; mvn ls r2 r2
263   0x98, 0xbf, 0xdb, 0x43 // It ls; mvn ls r3 r3
266   0x98, 0xbf, 0xe4, 0x43 // It ls; mvn ls r4 r4
269   0x98, 0xbf, 0xed, 0x43 // It ls; mvn ls r5 r5
272   0x98, 0xbf, 0xf6, 0x43 // It ls; mvn ls r6 r6
275   0x98, 0xbf, 0xff, 0x43 // It ls; mvn ls r7 r7
278   0xa8, 0xbf, 0xc0, 0x43 // It ge; mvn ge r0 r0
281   0xa8, 0xbf, 0xc9, 0x43 // It ge; mvn ge r1 r1
284   0xa8, 0xbf, 0xd2, 0x43 // It ge; mvn ge r2 r2
287   0xa8, 0xbf, 0xdb, 0x43 // It ge; mvn ge r3 r3
290   0xa8, 0xbf, 0xe4, 0x43 // It ge; mvn ge r4 r4
293   0xa8, 0xbf, 0xed, 0x43 // It ge; mvn ge r5 r5
296   0xa8, 0xbf, 0xf6, 0x43 // It ge; mvn ge r6 r6
299   0xa8, 0xbf, 0xff, 0x43 // It ge; mvn ge r7 r7
302   0xb8, 0xbf, 0xc0, 0x43 // It lt; mvn lt r0 r0
305   0xb8, 0xbf, 0xc9, 0x43 // It lt; mvn lt r1 r1
308   0xb8, 0xbf, 0xd2, 0x43 // It lt; mvn lt r2 r2
311   0xb8, 0xbf, 0xdb, 0x43 // It lt; mvn lt r3 r3
314   0xb8, 0xbf, 0xe4, 0x43 // It lt; mvn lt r4 r4
317   0xb8, 0xbf, 0xed, 0x43 // It lt; mvn lt r5 r5
320   0xb8, 0xbf, 0xf6, 0x43 // It lt; mvn lt r6 r6
323   0xb8, 0xbf, 0xff, 0x43 // It lt; mvn lt r7 r7
326   0xc8, 0xbf, 0xc0, 0x43 // It gt; mvn gt r0 r0
329   0xc8, 0xbf, 0xc9, 0x43 // It gt; mvn gt r1 r1
332   0xc8, 0xbf, 0xd2, 0x43 // It gt; mvn gt r2 r2
335   0xc8, 0xbf, 0xdb, 0x43 // It gt; mvn gt r3 r3
338   0xc8, 0xbf, 0xe4, 0x43 // It gt; mvn gt r4 r4
341   0xc8, 0xbf, 0xed, 0x43 // It gt; mvn gt r5 r5
344   0xc8, 0xbf, 0xf6, 0x43 // It gt; mvn gt r6 r6
347   0xc8, 0xbf, 0xff, 0x43 // It gt; mvn gt r7 r7
350   0xd8, 0xbf, 0xc0, 0x43 // It le; mvn le r0 r0
353   0xd8, 0xbf, 0xc9, 0x43 // It le; mvn le r1 r1
356   0xd8, 0xbf, 0xd2, 0x43 // It le; mvn le r2 r2
359   0xd8, 0xbf, 0xdb, 0x43 // It le; mvn le r3 r3
362   0xd8, 0xbf, 0xe4, 0x43 // It le; mvn le r4 r4
365   0xd8, 0xbf, 0xed, 0x43 // It le; mvn le r5 r5
368   0xd8, 0xbf, 0xf6, 0x43 // It le; mvn le r6 r6
371   0xd8, 0xbf, 0xff, 0x43 // It le; mvn le r7 r7

Indexes created Thu Nov 07 10:32:03 CST 2024