Lines Matching refs:CHECK_T32_16
3963 #define CHECK_T32_16(ASM, EXP) COMPARE_T32_CHECK_SIZE(ASM, EXP, 2)
3975 CHECK_T32_16(Adc(DontCare, r7, r7, r6), "adcs r7, r6\n");
3981 CHECK_T32_16(Add(DontCare, r6, r7, 7), "adds r6, r7, #7\n");
3987 CHECK_T32_16(Add(DontCare, r5, r5, 255), "adds r5, #255\n");
3995 CHECK_T32_16(Add(DontCare, r1, r1, r2), "add r1, r2\n");
3997 CHECK_T32_16(Add(DontCare, r1, r2, r7), "adds r1, r2, r7\n");
4003 CHECK_T32_16(Add(DontCare, r4, r4, r12), "add r4, ip\n");
4009 CHECK_T32_16(Add(DontCare, r0, sp, 1020), "add r0, sp, #1020\n");
4016 CHECK_T32_16(Add(DontCare, sp, sp, 508), "add sp, #508\n");
4018 CHECK_T32_16(Add(DontCare, r7, sp, r7), "add r7, sp, r7\n");
4024 CHECK_T32_16(Add(DontCare, sp, sp, r10), "add sp, r10\n");
4030 CHECK_T32_16(And(DontCare, r7, r7, r6), "ands r7, r6\n");
4036 CHECK_T32_16(Asr(DontCare, r0, r1, 32), "asrs r0, r1, #32\n");
4042 CHECK_T32_16(Asr(DontCare, r0, r0, r1), "asrs r0, r1\n");
4048 CHECK_T32_16(Bic(DontCare, r7, r7, r6), "bics r7, r6\n");
4054 CHECK_T32_16(Eor(DontCare, r7, r7, r6), "eors r7, r6\n");
4060 CHECK_T32_16(Lsl(DontCare, r0, r1, 31), "lsls r0, r1, #31\n");
4066 CHECK_T32_16(Lsl(DontCare, r0, r0, r1), "lsls r0, r1\n");
4072 CHECK_T32_16(Lsr(DontCare, r0, r1, 32), "lsrs r0, r1, #32\n");
4078 CHECK_T32_16(Lsr(DontCare, r0, r0, r1), "lsrs r0, r1\n");
4084 CHECK_T32_16(Mov(DontCare, r7, 255), "movs r7, #255\n");
4090 CHECK_T32_16(Mov(DontCare, r9, r8), "mov r9, r8\n");
4093 CHECK_T32_16(Mov(DontCare, r5, r6), "mov r5, r6\n");
4099 CHECK_T32_16(Mov(DontCare, r5, Operand(r6, ASR, 1)), "asrs r5, r6, #1\n");
4101 CHECK_T32_16(Mov(DontCare, r5, Operand(r6, ASR, 32)), "asrs r5, r6, #32\n");
4103 CHECK_T32_16(Mov(DontCare, r5, Operand(r6, LSR, 1)), "lsrs r5, r6, #1\n");
4105 CHECK_T32_16(Mov(DontCare, r5, Operand(r6, LSR, 32)), "lsrs r5, r6, #32\n");
4107 CHECK_T32_16(Mov(DontCare, r5, Operand(r6, LSL, 1)), "lsls r5, r6, #1\n");
4109 CHECK_T32_16(Mov(DontCare, r5, Operand(r6, LSL, 31)), "lsls r5, r6, #31\n");
4135 CHECK_T32_16(Mov(DontCare, r7, Operand(r7, ASR, r6)), "asrs r7, r6\n");
4141 CHECK_T32_16(Mov(DontCare, r7, Operand(r7, LSR, r6)), "lsrs r7, r6\n");
4147 CHECK_T32_16(Mov(DontCare, r7, Operand(r7, LSL, r6)), "lsls r7, r6\n");
4153 CHECK_T32_16(Mov(DontCare, r7, Operand(r7, ROR, r6)), "rors r7, r6\n");
4159 CHECK_T32_16(Mul(DontCare, r0, r1, r0), "muls r0, r1, r0\n");
4165 CHECK_T32_16(Mvn(DontCare, r6, r7), "mvns r6, r7\n");
4171 CHECK_T32_16(Orr(DontCare, r7, r7, r6), "orrs r7, r6\n");
4177 CHECK_T32_16(Ror(DontCare, r0, r0, r1), "rors r0, r1\n");
4183 CHECK_T32_16(Rsb(DontCare, r7, r6, 0), "rsbs r7, r6, #0\n");
4189 CHECK_T32_16(Sbc(DontCare, r7, r7, r6), "sbcs r7, r6\n");
4195 CHECK_T32_16(Sub(DontCare, r6, r7, 7), "subs r6, r7, #7\n");
4201 CHECK_T32_16(Sub(DontCare, r5, r5, 255), "subs r5, #255\n");
4207 CHECK_T32_16(Sub(DontCare, r1, r2, r7), "subs r1, r2, r7\n");
4214 CHECK_T32_16(Sub(DontCare, sp, sp, 508), "sub sp, #508\n");
4217 CHECK_T32_16(Add(DontCare, r0, r1, -1), "subs r0, r1, #1\n");
4219 CHECK_T32_16(Add(DontCare, r0, r1, -7), "subs r0, r1, #7\n");
4221 CHECK_T32_16(Add(DontCare, r6, r6, -1), "subs r6, #1\n");
4223 CHECK_T32_16(Add(DontCare, r6, r6, -255), "subs r6, #255\n");
4226 CHECK_T32_16(Sub(DontCare, r0, r1, -1), "adds r0, r1, #1\n");
4228 CHECK_T32_16(Sub(DontCare, r0, r1, -7), "adds r0, r1, #7\n");
4230 CHECK_T32_16(Sub(DontCare, r6, r6, -1), "adds r6, #1\n");
4232 CHECK_T32_16(Sub(DontCare, r6, r6, -255), "adds r6, #255\n");
4241 #undef CHECK_T32_16