xref: /third_party/vixl/test/aarch32/test-assembler-cond-rd-operand-rn-shift-rs-in-it-block-t32.cc

113      {{ls, r6, r6, LSL, r3}, true, ls, "ls r6 r6 LSL r3", "ls_r6_r6_LSL_r3"},
115      {{ls, r0, r0, LSR, r2}, true, ls, "ls r0 r0 LSR r2", "ls_r0_r0_LSR_r2"},
119      {{ls, r6, r6, LSR, r0}, true, ls, "ls r6 r6 LSR r0", "ls_r6_r6_LSR_r0"},
120      {{ls, r0, r0, ASR, r2}, true, ls, "ls r0 r0 ASR r2", "ls_r0_r0_ASR_r2"},
126      {{ls, r7, r7, LSL, r4}, true, ls, "ls r7 r7 LSL r4", "ls_r7_r7_LSL_r4"},
131      {{ls, r1, r1, LSR, r0}, true, ls, "ls r1 r1 LSR r0", "ls_r1_r1_LSR_r0"},
135      {{ls, r3, r3, LSL, r2}, true, ls, "ls r3 r3 LSL r2", "ls_r3_r3_LSL_r2"},
136      {{ls, r6, r6, ASR, r3}, true, ls, "ls r6 r6 ASR r3", "ls_r6_r6_ASR_r3"},
139      {{ls, r1, r1, LSR, r3}, true, ls, "ls r1 r1 LSR r3", "ls_r1_r1_LSR_r3"},
148      {{ls, r7, r7, LSR, r5}, true, ls, "ls r7 r7 LSR r5", "ls_r7_r7_LSR_r5"},
172      {{ls, r5, r5, LSR, r3}, true, ls, "ls r5 r5 LSR r3", "ls_r5_r5_LSR_r3"},
203      {{ls, r4, r4, LSL, r4}, true, ls, "ls r4 r4 LSL r4", "ls_r4_r4_LSL_r4"},
213      {{ls, r3, r3, ROR, r0}, true, ls, "ls r3 r3 ROR r0", "ls_r3_r3_ROR_r0"},
223      {{ls, r2, r2, LSL, r3}, true, ls, "ls r2 r2 LSL r3", "ls_r2_r2_LSL_r3"},
232      {{ls, r1, r1, ASR, r0}, true, ls, "ls r1 r1 ASR r0", "ls_r1_r1_ASR_r0"},
253      {{ls, r4, r4, ASR, r2}, true, ls, "ls r4 r4 ASR r2", "ls_r4_r4_ASR_r2"},
262      {{ls, r7, r7, LSL, r3}, true, ls, "ls r7 r7 LSL r3", "ls_r7_r7_LSL_r3"},
268      {{ls, r1, r1, LSL, r4}, true, ls, "ls r1 r1 LSL r4", "ls_r1_r1_LSL_r4"},
278      {{ls, r6, r6, ROR, r4}, true, ls, "ls r6 r6 ROR r4", "ls_r6_r6_ROR_r4"},
295      {{ls, r2, r2, LSL, r0}, true, ls, "ls r2 r2 LSL r0", "ls_r2_r2_LSL_r0"},
320      {{ls, r4, r4, ASR, r6}, true, ls, "ls r4 r4 ASR r6", "ls_r4_r4_ASR_r6"},
341      {{ls, r6, r6, ASR, r1}, true, ls, "ls r6 r6 ASR r1", "ls_r6_r6_ASR_r1"},
347      {{ls, r4, r4, LSR, r1}, true, ls, "ls r4 r4 LSR r1", "ls_r4_r4_LSR_r1"},
374      {{ls, r3, r3, LSL, r0}, true, ls, "ls r3 r3 LSL r0", "ls_r3_r3_LSL_r0"},
386      {{ls, r2, r2, ASR, r2}, true, ls, "ls r2 r2 ASR r2", "ls_r2_r2_ASR_r2"},
398      {{ls, r3, r3, ASR, r3}, true, ls, "ls r3 r3 ASR r3", "ls_r3_r3_ASR_r3"},
428      {{ls, r1, r1, ROR, r7}, true, ls, "ls r1 r1 ROR r7", "ls_r1_r1_ROR_r7"},
435      {{ls, r3, r3, ASR, r0}, true, ls, "ls r3 r3 ASR r0", "ls_r3_r3_ASR_r0"},
447      {{ls, r0, r0, ASR, r0}, true, ls, "ls r0 r0 ASR r0", "ls_r0_r0_ASR_r0"},
454      {{ls, r0, r0, ASR, r6}, true, ls, "ls r0 r0 ASR r6", "ls_r0_r0_ASR_r6"},
486      {{ls, r2, r2, ASR, r3}, true, ls, "ls r2 r2 ASR r3", "ls_r2_r2_ASR_r3"},
506      {{ls, r0, r0, ASR, r4}, true, ls, "ls r0 r0 ASR r4", "ls_r0_r0_ASR_r4"},
517      {{ls, r3, r3, LSL, r5}, true, ls, "ls r3 r3 LSL r5", "ls_r3_r3_LSL_r5"},
518      {{ls, r5, r5, ROR, r2}, true, ls, "ls r5 r5 ROR r2", "ls_r5_r5_ROR_r2"},
535      {{ls, r5, r5, LSR, r6}, true, ls, "ls r5 r5 LSR r6", "ls_r5_r5_LSR_r6"},
539      {{ls, r5, r5, LSL, r2}, true, ls, "ls r5 r5 LSL r2", "ls_r5_r5_LSL_r2"},
543      {{ls, r5, r5, ROR, r3}, true, ls, "ls r5 r5 ROR r3", "ls_r5_r5_ROR_r3"},
553      {{ls, r4, r4, LSL, r0}, true, ls, "ls r4 r4 LSL r0", "ls_r4_r4_LSL_r0"},
564      {{ls, r4, r4, LSR, r5}, true, ls, "ls r4 r4 LSR r5", "ls_r4_r4_LSR_r5"},
575      {{ls, r7, r7, ASR, r2}, true, ls, "ls r7 r7 ASR r2", "ls_r7_r7_ASR_r2"},
600      {{ls, r5, r5, ASR, r1}, true, ls, "ls r5 r5 ASR r1", "ls_r5_r5_ASR_r1"},
625      {{ls, r2, r2, LSR, r0}, true, ls, "ls r2 r2 LSR r0", "ls_r2_r2_LSR_r0"},
634      {{ls, r1, r1, LSL, r6}, true, ls, "ls r1 r1 LSL r6", "ls_r1_r1_LSL_r6"},
652      {{ls, r4, r4, ROR, r2}, true, ls, "ls r4 r4 ROR r2", "ls_r4_r4_ROR_r2"},
663      {{ls, r4, r4, LSL, r2}, true, ls, "ls r4 r4 LSL r2", "ls_r4_r4_LSL_r2"},
671      {{ls, r3, r3, ROR, r6}, true, ls, "ls r3 r3 ROR r6", "ls_r3_r3_ROR_r6"},
688      {{ls, r2, r2, LSL, r6}, true, ls, "ls r2 r2 LSL r6", "ls_r2_r2_LSL_r6"},
700      {{ls, r0, r0, LSR, r5}, true, ls, "ls r0 r0 LSR r5", "ls_r0_r0_LSR_r5"},
704      {{ls, r5, r5, ASR, r5}, true, ls, "ls r5 r5 ASR r5", "ls_r5_r5_ASR_r5"},
733      {{ls, r1, r1, LSR, r1}, true, ls, "ls r1 r1 LSR r1", "ls_r1_r1_LSR_r1"},
734      {{ls, r4, r4, LSR, r2}, true, ls, "ls r4 r4 LSR r2", "ls_r4_r4_LSR_r2"},
741      {{ls, r2, r2, ASR, r0}, true, ls, "ls r2 r2 ASR r0", "ls_r2_r2_ASR_r0"},
753      {{ls, r6, r6, LSR, r4}, true, ls, "ls r6 r6 LSR r4", "ls_r6_r6_LSR_r4"},
756      {{ls, r0, r0, LSR, r3}, true, ls, "ls r0 r0 LSR r3", "ls_r0_r0_LSR_r3"},
764      {{ls, r1, r1, LSL, r2}, true, ls, "ls r1 r1 LSL r2", "ls_r1_r1_LSL_r2"},
767      {{ls, r2, r2, ASR, r1}, true, ls, "ls r2 r2 ASR r1", "ls_r2_r2_ASR_r1"},
768      {{ls, r3, r3, LSL, r6}, true, ls, "ls r3 r3 LSL r6", "ls_r3_r3_LSL_r6"},
820      {{ls, r3, r3, ROR, r4}, true, ls, "ls r3 r3 ROR r4", "ls_r3_r3_ROR_r4"},
828      {{ls, r7, r7, ROR, r1}, true, ls, "ls r7 r7 ROR r1", "ls_r7_r7_ROR_r1"},
829      {{ls, r2, r2, ROR, r3}, true, ls, "ls r2 r2 ROR r3", "ls_r2_r2_ROR_r3"},
842      {{ls, r4, r4, LSR, r4}, true, ls, "ls r4 r4 LSR r4", "ls_r4_r4_LSR_r4"},
848      {{ls, r4, r4, ASR, r3}, true, ls, "ls r4 r4 ASR r3", "ls_r4_r4_ASR_r3"},
855      {{ls, r6, r6, LSL, r6}, true, ls, "ls r6 r6 LSL r6", "ls_r6_r6_LSL_r6"},
872      {{ls, r4, r4, ASR, r1}, true, ls, "ls r4 r4 ASR r1", "ls_r4_r4_ASR_r1"},
877      {{ls, r6, r6, ASR, r0}, true, ls, "ls r6 r6 ASR r0", "ls_r6_r6_ASR_r0"},
878      {{ls, r1, r1, LSL, r5}, true, ls, "ls r1 r1 LSL r5", "ls_r1_r1_LSL_r5"},
897      {{ls, r0, r0, ROR, r3}, true, ls, "ls r0 r0 ROR r3", "ls_r0_r0_ROR_r3"},
899      {{ls, r3, r3, ROR, r5}, true, ls, "ls r3 r3 ROR r5", "ls_r3_r3_ROR_r5"},
902      {{ls, r0, r0, LSR, r0}, true, ls, "ls r0 r0 LSR r0", "ls_r0_r0_LSR_r0"},
903      {{ls, r5, r5, ASR, r4}, true, ls, "ls r5 r5 ASR r4", "ls_r5_r5_ASR_r4"},
910      {{ls, r5, r5, LSR, r5}, true, ls, "ls r5 r5 LSR r5", "ls_r5_r5_LSR_r5"},
914      {{ls, r6, r6, ASR, r2}, true, ls, "ls r6 r6 ASR r2", "ls_r6_r6_ASR_r2"},
923      {{ls, r7, r7, ASR, r0}, true, ls, "ls r7 r7 ASR r0", "ls_r7_r7_ASR_r0"},
926      {{ls, r7, r7, ASR, r1}, true, ls, "ls r7 r7 ASR r1", "ls_r7_r7_ASR_r1"},
932      {{ls, r0, r0, LSL, r3}, true, ls, "ls r0 r0 LSL r3", "ls_r0_r0_LSL_r3"},
935      {{ls, r6, r6, ROR, r0}, true, ls, "ls r6 r6 ROR r0", "ls_r6_r6_ROR_r0"},
960      {{ls, r6, r6, LSR, r3}, true, ls, "ls r6 r6 LSR r3", "ls_r6_r6_LSR_r3"},
967      {{ls, r5, r5, LSL, r4}, true, ls, "ls r5 r5 LSL r4", "ls_r5_r5_LSL_r4"},
971      {{ls, r0, r0, LSL, r5}, true, ls, "ls r0 r0 LSL r5", "ls_r0_r0_LSL_r5"},
976      {{ls, r0, r0, LSR, r7}, true, ls, "ls r0 r0 LSR r7", "ls_r0_r0_LSR_r7"},
982      {{ls, r4, r4, LSR, r7}, true, ls, "ls r4 r4 LSR r7", "ls_r4_r4_LSR_r7"},
1015      {{ls, r2, r2, ROR, r2}, true, ls, "ls r2 r2 ROR r2", "ls_r2_r2_ROR_r2"},
1021      {{ls, r3, r3, ASR, r6}, true, ls, "ls r3 r3 ASR r6", "ls_r3_r3_ASR_r6"},
1042      {{ls, r3, r3, ASR, r2}, true, ls, "ls r3 r3 ASR r2", "ls_r3_r3_ASR_r2"},
1044      {{ls, r2, r2, ASR, r4}, true, ls, "ls r2 r2 ASR r4", "ls_r2_r2_ASR_r4"},
1071      {{ls, r6, r6, LSR, r6}, true, ls, "ls r6 r6 LSR r6", "ls_r6_r6_LSR_r6"},
1089      {{ls, r3, r3, ROR, r3}, true, ls, "ls r3 r3 ROR r3", "ls_r3_r3_ROR_r3"},

Indexes created Thu Nov 07 10:32:03 CST 2024