Lines Matching refs:dst
557 void ReadLane(T* dst, int lane) const {
559 VIXL_ASSERT((sizeof(*dst) + (lane * sizeof(*dst))) <= GetSizeInBytes());
560 memcpy(dst, &value_[lane * sizeof(*dst)], sizeof(*dst));
574 void ReadLane(vixl::internal::SimFloat16* dst, int lane) const {
577 *dst = RawbitsToFloat16(rawbits);
767 int UintArray(VectorFormat vform, uint64_t* dst) const {
769 dst[i] = Uint(vform, i);
2058 void LoadLane(LogicVRegister dst,
2063 LoadUintToLane(dst, vform, msize_in_bytes, index, addr);
2066 void LoadUintToLane(LogicVRegister dst,
2071 dst.SetUint(vform, index, MemReadUint(msize_in_bytes, addr));
2074 void LoadIntToLane(LogicVRegister dst,
2079 dst.SetInt(vform, index, MemReadInt(msize_in_bytes, addr));
2565 void LogMemTransfer(uintptr_t dst, uintptr_t src, uint8_t value) {
2566 if (ShouldTraceWrites()) PrintMemTransfer(dst, src, value);
2579 void PrintMemTransfer(uintptr_t dst, uintptr_t src, uint8_t value);
2847 void PACHelper(int dst,
3321 void ld1(VectorFormat vform, LogicVRegister dst, uint64_t addr);
3322 void ld1(VectorFormat vform, LogicVRegister dst, int index, uint64_t addr);
3323 void ld1r(VectorFormat vform, LogicVRegister dst, uint64_t addr);
3326 LogicVRegister dst,
3413 LogicVRegister dst,
3418 LogicVRegister dst,
3423 LogicVRegister dst,
3427 LogicVRegister dst,
3433 LogicVRegister dst,
3437 LogicVRegister dst,
3457 // dst = srca + src1 * src2
3459 LogicVRegister dst,
3463 // dst = srca - src1 * src2
3465 LogicVRegister dst,
3470 LogicVRegister dst,
3474 LogicVRegister dst,
3479 LogicVRegister dst,
3484 LogicVRegister dst,
3489 LogicVRegister dst,
3493 LogicVRegister dst,
3497 LogicVRegister dst,
3502 LogicVRegister dst,
3507 LogicVRegister dst,
3512 LogicVRegister dst,
3517 LogicVRegister dst,
3522 LogicVRegister dst,
3527 LogicVRegister dst,
3532 LogicVRegister dst,
3537 LogicVRegister dst,
3542 LogicVRegister dst,
3547 LogicVRegister dst,
3551 LogicVRegister dst,
3555 LogicVRegister dst,
3560 LogicVRegister dst,
3565 LogicVRegister dst,
3570 LogicVRegister dst,
3575 LogicVRegister dst,
3580 LogicVRegister dst,
3585 LogicVRegister dst,
3590 LogicVRegister dst,
3596 LogicVRegister dst,
3600 LogicVRegister dst,
3604 LogicVRegister dst,
3608 LogicVRegister dst,
3612 LogicVRegister dst,
3616 LogicVRegister dst,
3620 LogicVRegister dst,
3624 LogicVRegister dst,
3628 LogicVRegister dst,
3632 LogicVRegister dst,
3637 LogicVRegister dst,
3640 LogicVRegister dst,
3643 LogicVRegister dst,
3646 LogicVRegister dst,
3649 LogicVRegister dst,
3652 LogicVRegister dst,
3655 LogicVRegister dst,
3658 LogicVRegister dst,
3662 LogicVRegister dst,
3665 LogicVRegister dst,
3668 LogicVRegister dst,
3671 LogicVRegister dst,
3676 LogicVRegister dst,
3679 LogicVRegister dst,
3682 LogicVRegister dst,
3685 LogicVRegister dst,
3688 LogicVRegister dst,
3692 LogicVRegister dst,
3697 LogicVRegister dst,
3702 LogicVRegister dst,
3707 LogicVRegister dst,
3713 LogicVRegister dst,
3720 LogicVRegister dst,
3726 LogicVRegister dst,
3741 LogicVRegister dst,
3747 LogicVRegister dst,
3753 LogicVRegister dst,
3760 LogicVRegister dst,
3765 LogicVRegister dst,
3769 LogicVRegister dst,
3775 LogicVRegister dst,
3779 LogicVRegister dst,
3784 LogicVRegister dst,
3787 LogicVRegister insr(VectorFormat vform, LogicVRegister dst, uint64_t imm);
3789 LogicVRegister dst,
3793 LogicVRegister dst,
3798 LogicVRegister dst,
3801 LogicVRegister dst,
3804 LogicVRegister dst,
3806 LogicPRegister mov(LogicPRegister dst, const LogicPRegister& src);
3808 LogicVRegister dst,
3812 LogicVRegister dst,
3816 LogicVRegister dst,
3819 LogicPRegister mov_merging(LogicPRegister dst,
3822 LogicPRegister mov_zeroing(LogicPRegister dst,
3825 LogicVRegister movi(VectorFormat vform, LogicVRegister dst, uint64_t imm);
3826 LogicVRegister mvni(VectorFormat vform, LogicVRegister dst, uint64_t imm);
3828 LogicVRegister dst,
3832 LogicVRegister dst,
3837 LogicVRegister dst,
3842 LogicVRegister dst,
3846 LogicVRegister dst,
3858 LogicPRegister dst,
3863 LogicVRegister dst,
3867 LogicVRegister dst,
3872 LogicVRegister dst,
3876 LogicPRegister sel(LogicPRegister dst,
3881 LogicVRegister dst,
3886 LogicVRegister dst,
3890 LogicVRegister dst,
3894 LogicVRegister dst,
3899 LogicVRegister dst,
3903 LogicVRegister dst,
3907 LogicVRegister dst,
3910 LogicVRegister dst,
3913 LogicVRegister dst,
3916 LogicVRegister dst,
3919 LogicVRegister dst,
3924 LogicVRegister dst,
3927 LogicVRegister dst,
3930 LogicVRegister dst,
3934 LogicVRegister dst,
3937 LogicVRegister dst,
3941 LogicVRegister dst,
3944 LogicVRegister dst,
3948 LogicVRegister dst,
3952 LogicVRegister dst,
3956 LogicVRegister dst,
3961 LogicVRegister dst,
3967 LogicVRegister dst,
3974 LogicVRegister dst,
3982 LogicVRegister dst,
3986 LogicVRegister dst,
3991 LogicVRegister dst,
3997 LogicVRegister dst,
4004 LogicVRegister dst,
4008 LogicVRegister dst,
4012 LogicVRegister dst,
4016 LogicVRegister dst,
4020 LogicVRegister dst,
4024 LogicVRegister dst,
4028 LogicVRegister dst,
4032 LogicVRegister dst,
4036 LogicVRegister dst,
4040 LogicVRegister dst,
4044 LogicVRegister dst,
4048 LogicVRegister dst,
4052 LogicVRegister dst,
4056 LogicVRegister dst,
4060 LogicVRegister dst,
4064 LogicVRegister dst,
4068 LogicVRegister dst,
4073 LogicVRegister dst,
4077 LogicVRegister dst,
4081 LogicVRegister dst,
4086 LogicVRegister dst,
4090 LogicVRegister dst,
4094 LogicVRegister dst,
4099 LogicVRegister dst,
4102 LogicVRegister dst,
4105 LogicVRegister dst,
4109 LogicVRegister dst,
4113 LogicVRegister dst,
4117 LogicVRegister dst,
4121 LogicVRegister dst,
4125 LogicVRegister dst,
4129 LogicVRegister dst,
4135 LogicVRegister dst,
4141 LogicVRegister dst,
4148 LogicVRegister dst,
4154 LogicVRegister dst,
4159 LogicVRegister dst,
4163 LogicVRegister dst,
4167 LogicVRegister dst,
4170 LogicVRegister dst,
4173 LogicVRegister dst,
4177 LogicVRegister dst,
4181 LogicVRegister dst,
4185 LogicVRegister dst,
4189 LogicVRegister dst,
4193 LogicVRegister dst,
4197 LogicVRegister dst,
4201 LogicVRegister dst,
4205 LogicVRegister dst,
4209 LogicVRegister dst,
4213 LogicVRegister dst,
4217 LogicVRegister dst,
4221 LogicVRegister dst,
4225 LogicVRegister dst,
4229 LogicVRegister dst,
4233 LogicVRegister dst,
4236 LogicVRegister dst,
4239 LogicVRegister dst,
4244 LogicVRegister dst,
4247 LogicVRegister dst,
4250 LogicVRegister dst,
4253 LogicVRegister dst,
4256 LogicVRegister dst,
4261 LogicVRegister dst,
4265 LogicVRegister dst,
4269 LogicVRegister dst,
4273 LogicVRegister dst,
4277 LogicVRegister dst,
4281 LogicVRegister dst,
4285 LogicVRegister dst,
4289 LogicVRegister dst,
4293 LogicVRegister dst,
4297 LogicVRegister dst,
4301 LogicVRegister dst,
4305 LogicVRegister dst,
4309 LogicVRegister dst,
4313 LogicVRegister dst,
4317 LogicVRegister dst,
4321 LogicVRegister dst,
4325 LogicVRegister dst,
4329 LogicVRegister dst,
4333 LogicVRegister dst,
4338 LogicVRegister dst,
4344 LogicVRegister dst,
4348 LogicVRegister dst,
4352 LogicVRegister dst,
4356 LogicVRegister dst,
4362 LogicVRegister dst,
4368 LogicVRegister dst,
4375 LogicVRegister dst,
4381 LogicVRegister dst,
4387 LogicVRegister dst,
4392 LogicVRegister dst,
4397 LogicVRegister dst,
4401 LogicVRegister dst,
4446 LogicVRegister dst, \
4465 LogicVRegister dst, \
4486 LogicVRegister dst, \
4490 LogicVRegister dst, \
4505 LogicVRegister dst, \
4509 LogicVRegister dst, \
4522 LogicVRegister dst,
4526 LogicVRegister dst,
4531 LogicVRegister dst,
4535 LogicVRegister dst,
4540 LogicVRegister dst,
4545 LogicVRegister dst,
4551 LogicVRegister dst,
4556 LogicVRegister dst,
4561 LogicVRegister dst,
4566 LogicVRegister dst,
4570 LogicVRegister dst,
4574 LogicVRegister dst,
4578 LogicVRegister dst,
4584 LogicVRegister dst,
4589 LogicVRegister dst,
4594 LogicVRegister dst,
4599 LogicVRegister dst,
4605 LogicVRegister dst,
4608 LogicVRegister dst,
4612 LogicVRegister dst,
4615 LogicVRegister dst,
4618 LogicVRegister dst,
4622 LogicVRegister dst,
4626 LogicVRegister dst,
4631 LogicVRegister dst,
4634 LogicVRegister dst,
4638 LogicVRegister dst,
4642 LogicVRegister dst,
4647 LogicVRegister dst,
4650 LogicVRegister dst,
4653 LogicVRegister dst,
4657 LogicVRegister dst,
4664 LogicVRegister dst,
4670 LogicVRegister dst,
4676 LogicVRegister dst,
4683 LogicVRegister dst,
4689 LogicVRegister dst,
4694 LogicVRegister dst,
4697 LogicVRegister dst,
4700 LogicVRegister dst,
4703 LogicVRegister dst,
4706 LogicVRegister dst,
4709 LogicVRegister dst,
4712 LogicVRegister dst,
4715 LogicVRegister dst,
4718 LogicVRegister dst,
4722 LogicVRegister dst,
4725 LogicVRegister dst,
4728 LogicPRegister pfalse(LogicPRegister dst);
4729 LogicPRegister pfirst(LogicPRegister dst,
4732 LogicPRegister ptrue(VectorFormat vform, LogicPRegister dst, int pattern);
4734 LogicPRegister dst,
4739 LogicVRegister dst,
4744 LogicVRegister dst,
4748 LogicVRegister dst,
4752 LogicVRegister dst,
4756 LogicVRegister dst,
4760 LogicVRegister dst,
4764 LogicVRegister dst,
4768 LogicVRegister dst,
4772 LogicVRegister dst,
4776 LogicVRegister dst,
4781 LogicVRegister dst,
4791 LogicVRegister dst,
4798 LogicVRegister dst,
4806 LogicVRegister dst,
4809 LogicVRegister dst,
4812 LogicVRegister dst,
4815 LogicVRegister dst,
4818 LogicVRegister dst,
4960 LogicPRegister dst,
5017 LogicVRegister dst,
5028 LogicVRegister dst,
5034 LogicVRegister dst,
5038 LogicVRegister dst,
5045 LogicVRegister dst,