Lines Matching refs:code
7 // * Redistributions of source code must retain the above copyright notice,
539 // updated lanes for load-and-insert. (That never happens for scalar code, but
1275 // This allows code like:
1282 R RunFrom(const Instruction* code, P... arguments) {
1283 return RunFromStructHelper<R, P...>::Wrapper(this, code, arguments...);
1289 const Instruction* code,
1301 simulator->RunFrom(code);
1310 const Instruction* code,
1322 simulator->RunFrom(code);
1507 T ReadRegister(unsigned code, Reg31Mode r31mode = Reg31IsZeroRegister) const {
1509 code < kNumberOfRegisters ||
1510 ((r31mode == Reg31IsZeroRegister) && (code == kSPRegInternalCode)));
1511 if ((code == 31) && (r31mode == Reg31IsZeroRegister)) {
1516 if ((r31mode == Reg31IsZeroRegister) && (code == kSPRegInternalCode)) {
1517 code = 31;
1519 return registers_[code].Get<T>();
1523 T reg(unsigned code, Reg31Mode r31mode = Reg31IsZeroRegister)
1525 return ReadRegister<T>(code, r31mode);
1529 int32_t ReadWRegister(unsigned code,
1531 return ReadRegister<int32_t>(code, r31mode);
1534 int32_t wreg(unsigned code,
1536 return ReadWRegister(code, r31mode);
1539 int64_t ReadXRegister(unsigned code,
1541 return ReadRegister<int64_t>(code, r31mode);
1544 int64_t xreg(unsigned code,
1546 return ReadXRegister(code, r31mode);
1549 SimPRegister& ReadPRegister(unsigned code) {
1550 VIXL_ASSERT(code < kNumberOfPRegisters);
1551 return pregisters_[code];
1560 unsigned code,
1565 raw = ReadRegister<uint32_t>(code, r31mode);
1568 raw = ReadRegister<uint64_t>(code, r31mode);
1584 unsigned code,
1586 return ReadRegister<T>(size, code, r31mode);
1591 unsigned code,
1593 return ReadRegister<int64_t>(size, code, r31mode);
1597 unsigned code,
1599 return ReadRegister(size, code, r31mode);
1608 // - (code == kSPRegInternalCode) && (r31mode == Reg31IsZeroRegister)
1609 // - (code == 31) && (r31mode == Reg31IsStackPointer)
1611 void WriteRegister(unsigned code,
1618 // must be valid even if we know the code will never be executed, in
1622 WriteRegister<int32_t>(code, tmp_32bit, log_mode, r31mode);
1629 (code < kNumberOfRegisters) ||
1630 ((r31mode == Reg31IsZeroRegister) && (code == kSPRegInternalCode)));
1632 if (code == 31) {
1637 code = kSPRegInternalCode;
1643 registers_[code % kNumberOfRegisters].Write(value);
1646 LogRegister(code, GetPrintRegisterFormatForSize(sizeof(T)));
1651 void set_reg(unsigned code,
1655 WriteRegister<T>(code, value, log_mode, r31mode);
1659 void WriteWRegister(unsigned code,
1663 WriteRegister(code, value, log_mode, r31mode);
1666 void set_wreg(unsigned code,
1670 WriteWRegister(code, value, log_mode, r31mode);
1673 void WriteXRegister(unsigned code,
1677 WriteRegister(code, value, log_mode, r31mode);
1680 void set_xreg(unsigned code,
1684 WriteXRegister(code, value, log_mode, r31mode);
1691 unsigned code,
1703 WriteRegister(code, static_cast<uint32_t>(raw), log_mode, r31mode);
1706 WriteRegister(code, raw, log_mode, r31mode);
1716 unsigned code,
1720 WriteRegister(size, code, value, log_mode, r31mode);
1760 T ReadVRegister(unsigned code) const {
1765 VIXL_ASSERT(code < kNumberOfVRegisters);
1767 return vregisters_[code].Get<T>();
1770 VIXL_DEPRECATED("ReadVRegister", T vreg(unsigned code) const) {
1771 return ReadVRegister<T>(code);
1775 int8_t ReadBRegister(unsigned code) const {
1776 return ReadVRegister<int8_t>(code);
1778 VIXL_DEPRECATED("ReadBRegister", int8_t breg(unsigned code) const) {
1779 return ReadBRegister(code);
1782 vixl::internal::SimFloat16 ReadHRegister(unsigned code) const {
1783 return RawbitsToFloat16(ReadHRegisterBits(code));
1785 VIXL_DEPRECATED("ReadHRegister", int16_t hreg(unsigned code) const) {
1786 return Float16ToRawbits(ReadHRegister(code));
1789 uint16_t ReadHRegisterBits(unsigned code) const {
1790 return ReadVRegister<uint16_t>(code);
1793 float ReadSRegister(unsigned code) const {
1794 return ReadVRegister<float>(code);
1796 VIXL_DEPRECATED("ReadSRegister", float sreg(unsigned code) const) {
1797 return ReadSRegister(code);
1800 uint32_t ReadSRegisterBits(unsigned code) const {
1801 return ReadVRegister<uint32_t>(code);
1804 uint32_t sreg_bits(unsigned code) const) {
1805 return ReadSRegisterBits(code);
1808 double ReadDRegister(unsigned code) const {
1809 return ReadVRegister<double>(code);
1811 VIXL_DEPRECATED("ReadDRegister", double dreg(unsigned code) const) {
1812 return ReadDRegister(code);
1815 uint64_t ReadDRegisterBits(unsigned code) const {
1816 return ReadVRegister<uint64_t>(code);
1819 uint64_t dreg_bits(unsigned code) const) {
1820 return ReadDRegisterBits(code);
1823 qreg_t ReadQRegister(unsigned code) const {
1824 return ReadVRegister<qreg_t>(code);
1826 VIXL_DEPRECATED("ReadQRegister", qreg_t qreg(unsigned code) const) {
1827 return ReadQRegister(code);
1833 T ReadVRegister(unsigned size, unsigned code) const {
1839 raw = ReadVRegister<uint32_t>(code);
1842 raw = ReadVRegister<uint64_t>(code);
1855 VIXL_DEPRECATED("ReadVRegister", T vreg(unsigned size, unsigned code) const) {
1856 return ReadVRegister<T>(size, code);
1859 SimVRegister& ReadVRegister(unsigned code) { return vregisters_[code]; }
1860 VIXL_DEPRECATED("ReadVRegister", SimVRegister& vreg(unsigned code)) {
1861 return ReadVRegister(code);
1866 void WriteVRegister(unsigned code,
1875 VIXL_ASSERT(code < kNumberOfVRegisters);
1876 vregisters_[code].Write(value);
1879 LogVRegister(code, GetPrintRegisterFormat(value));
1884 void set_vreg(unsigned code,
1887 WriteVRegister(code, value, log_mode);
1891 void WriteBRegister(unsigned code,
1894 WriteVRegister(code, value, log_mode);
1897 void set_breg(unsigned code,
1900 return WriteBRegister(code, value, log_mode);
1903 void WriteHRegister(unsigned code,
1906 WriteVRegister(code, Float16ToRawbits(value), log_mode);
1909 void WriteHRegister(unsigned code,
1912 WriteVRegister(code, value, log_mode);
1915 void set_hreg(unsigned code,
1918 return WriteHRegister(code, value, log_mode);
1921 void WriteSRegister(unsigned code,
1924 WriteVRegister(code, value, log_mode);
1927 void set_sreg(unsigned code,
1930 WriteSRegister(code, value, log_mode);
1933 void WriteSRegisterBits(unsigned code,
1936 WriteVRegister(code, value, log_mode);
1939 void set_sreg_bits(unsigned code,
1942 WriteSRegisterBits(code, value, log_mode);
1945 void WriteDRegister(unsigned code,
1948 WriteVRegister(code, value, log_mode);
1951 void set_dreg(unsigned code,
1954 WriteDRegister(code, value, log_mode);
1957 void WriteDRegisterBits(unsigned code,
1960 WriteVRegister(code, value, log_mode);
1963 void set_dreg_bits(unsigned code,
1966 WriteDRegisterBits(code, value, log_mode);
1969 void WriteQRegister(unsigned code,
1972 WriteVRegister(code, value, log_mode);
1975 void set_qreg(unsigned code,
1978 WriteQRegister(code, value, log_mode);
1981 void WriteZRegister(unsigned code,
1984 WriteVRegister(code, value, log_mode);
2109 // bits may contain unrelated values that the code following this write
2448 void PrintRegister(int code,
2451 void PrintVRegister(int code,
2456 void PrintZRegister(int code, PrintRegisterFormat format = kPrintRegVnQ);
2457 void PrintPRegister(int code, PrintRegisterFormat format = kPrintRegVnQ);
2462 void PrintPartialZRegister(int code,
2466 void PrintPartialPRegister(int code,
2477 void LogRegister(unsigned code, PrintRegisterFormat format) {
2478 if (ShouldTraceRegs()) PrintRegister(code, format);
2480 void LogVRegister(unsigned code, PrintRegisterFormat format) {
2481 if (ShouldTraceVRegs()) PrintVRegister(code, format);
2483 void LogZRegister(unsigned code, PrintRegisterFormat format) {
2484 if (ShouldTraceVRegs()) PrintZRegister(code, format);
2486 void LogPRegister(unsigned code, PrintRegisterFormat format) {
2487 if (ShouldTraceVRegs()) PrintPRegister(code, format);
2726 static const char* WRegNameForCode(unsigned code,
2728 static const char* XRegNameForCode(unsigned code,
2730 static const char* BRegNameForCode(unsigned code);
2731 static const char* HRegNameForCode(unsigned code);
2732 static const char* SRegNameForCode(unsigned code);
2733 static const char* DRegNameForCode(unsigned code);
2734 static const char* VRegNameForCode(unsigned code);
2735 static const char* ZRegNameForCode(unsigned code);
2736 static const char* PRegNameForCode(unsigned code);
4973 // `zt_code` specifies the code of the first register (zt). Each additional
5107 // FPCR is set. This allows generated code to modify FPCR for external
5109 // code.