Lines Matching defs:value
200 static void SetActive(bool value) { is_active = value; }
220 R value = (pair == map->end()) ? nullptr : &pair->second;
221 return value;
370 T value;
371 VIXL_STATIC_ASSERT((sizeof(value) == 1) || (sizeof(value) == 2) ||
372 (sizeof(value) == 4) || (sizeof(value) == 8) ||
373 (sizeof(value) == 16));
375 if (stack_.IsAccessInGuardRegion(base, sizeof(value))) {
381 memcpy(&value, base, sizeof(value));
382 return value;
386 void Write(A address, T value, Instruction const* pc = nullptr) const {
387 VIXL_STATIC_ASSERT((sizeof(value) == 1) || (sizeof(value) == 2) ||
388 (sizeof(value) == 4) || (sizeof(value) == 8) ||
389 (sizeof(value) == 16));
391 if (stack_.IsAccessInGuardRegion(base, sizeof(value))) {
397 memcpy(base, &value, sizeof(value));
433 void Write(int size_in_bytes, A address, uint64_t value) const {
436 return Write(address, static_cast<uint8_t>(value));
438 return Write(address, static_cast<uint16_t>(value));
440 return Write(address, static_cast<uint32_t>(value));
442 return Write(address, value);
480 // Write the specified value. The value is zero-extended if necessary.
498 // Insert a typed value into a register, leaving the rest of the register
499 // unchanged. The lane parameter indicates where in the register the value
508 // Get the value as the specified type. The value is truncated if necessary.
514 // Get the lane value as the specified type. The value is truncated if
527 // Get the value of a specific bit, indexed from the least-significant bit of
621 void SetActive(VectorFormat vform, int lane_index, bool value) {
627 register_.Insert(byte_index, ZeroExtend(byte, bit_offset, psize, value));
679 uint8_t ZeroExtend(uint8_t byte, int index, int psize, bool value) {
682 int bits = value ? 1 : 0;
779 uint64_t value = UintLeftJustified(vform, index);
781 memcpy(&result, &value, sizeof(result));
785 void SetInt(VectorFormat vform, int index, int64_t value) const {
789 register_.Insert(index, static_cast<int8_t>(value));
792 register_.Insert(index, static_cast<int16_t>(value));
795 register_.Insert(index, static_cast<int32_t>(value));
798 register_.Insert(index, static_cast<int64_t>(value));
813 void SetUint(VectorFormat vform, int index, uint64_t value) const {
817 register_.Insert(index, static_cast<uint8_t>(value));
820 register_.Insert(index, static_cast<uint16_t>(value));
823 register_.Insert(index, static_cast<uint32_t>(value));
826 register_.Insert(index, static_cast<uint64_t>(value));
847 void SetFloat(int index, T value) const {
848 register_.Insert(index, value);
852 void SetFloat(VectorFormat vform, int index, T value) const {
854 register_.Insert(index, value);
1027 // `base` should be the constant used for each element. That is, the value
1115 // It is not possible to set its value to anything other than 0.
1163 SimSystemRegister(uint32_t value, uint32_t write_ignore_mask)
1164 : value_(value), write_ignore_mask_(write_ignore_mask) {}
1274 // the result value.
1556 // As above, with parameterized size and return type. The value is
1604 // Write 'value' into an integer register. The value is zero-extended. This
1612 T value,
1620 int64_t tmp_64bit = (int64_t)value;
1643 registers_[code % kNumberOfRegisters].Write(value);
1652 T value,
1655 WriteRegister<T>(code, value, log_mode, r31mode);
1660 int32_t value,
1663 WriteRegister(code, value, log_mode, r31mode);
1667 int32_t value,
1670 WriteWRegister(code, value, log_mode, r31mode);
1674 int64_t value,
1677 WriteRegister(code, value, log_mode, r31mode);
1681 int64_t value,
1684 WriteXRegister(code, value, log_mode, r31mode);
1687 // As above, with parameterized size and type. The value is either
1692 T value,
1697 VIXL_STATIC_ASSERT(sizeof(value) <= sizeof(raw));
1698 memcpy(&raw, &value, sizeof(value));
1700 // Write (and possibly truncate) the value.
1717 T value,
1720 WriteRegister(size, code, value, log_mode, r31mode);
1727 void WriteLr(T value) {
1728 WriteRegister(kLinkRegCode, value);
1731 VIXL_DEPRECATED("WriteLr", void set_lr(T value)) {
1732 WriteLr(value);
1736 void WriteSp(T value) {
1737 WriteRegister(31, value, LogRegWrites, Reg31IsStackPointer);
1740 VIXL_DEPRECATED("WriteSp", void set_sp(T value)) {
1741 WriteSp(value);
1830 // As above, with parameterized size and return type. The value is
1864 // Basic accessor: Write the specified value.
1867 T value,
1869 VIXL_STATIC_ASSERT((sizeof(value) == kBRegSizeInBytes) ||
1870 (sizeof(value) == kHRegSizeInBytes) ||
1871 (sizeof(value) == kSRegSizeInBytes) ||
1872 (sizeof(value) == kDRegSizeInBytes) ||
1873 (sizeof(value) == kQRegSizeInBytes) ||
1874 (sizeof(value) == kZRegMaxSizeInBytes));
1876 vregisters_[code].Write(value);
1879 LogVRegister(code, GetPrintRegisterFormat(value));
1885 T value,
1887 WriteVRegister(code, value, log_mode);
1892 int8_t value,
1894 WriteVRegister(code, value, log_mode);
1898 int8_t value,
1900 return WriteBRegister(code, value, log_mode);
1904 vixl::internal::SimFloat16 value,
1906 WriteVRegister(code, Float16ToRawbits(value), log_mode);
1910 int16_t value,
1912 WriteVRegister(code, value, log_mode);
1916 int16_t value,
1918 return WriteHRegister(code, value, log_mode);
1922 float value,
1924 WriteVRegister(code, value, log_mode);
1928 float value,
1930 WriteSRegister(code, value, log_mode);
1934 uint32_t value,
1936 WriteVRegister(code, value, log_mode);
1940 uint32_t value,
1942 WriteSRegisterBits(code, value, log_mode);
1946 double value,
1948 WriteVRegister(code, value, log_mode);
1952 double value,
1954 WriteDRegister(code, value, log_mode);
1958 uint64_t value,
1960 WriteVRegister(code, value, log_mode);
1964 uint64_t value,
1966 WriteDRegisterBits(code, value, log_mode);
1970 qreg_t value,
1972 WriteVRegister(code, value, log_mode);
1976 qreg_t value,
1978 WriteQRegister(code, value, log_mode);
1982 zreg_t value,
1984 WriteVRegister(code, value, log_mode);
1994 T value,
1996 WriteRegister<T>(reg.GetCode(), value, log_mode, Reg31IsZeroRegister);
2006 T value,
2008 WriteVRegister<T>(vreg.GetCode(), value, log_mode);
2022 T value,
2025 WriteVRegister<T>(VRegister(reg), value, log_mode);
2027 WriteRegister<T>(Register(reg), value, log_mode);
2038 void MemWrite(A address, T value) const {
2040 return memory_.Write(address, value, pc);
2054 void MemWrite(int size_in_bytes, A address, uint64_t value) const {
2055 return memory_.Write(size_in_bytes, address, value);
2104 T value,
2108 // the width of the value to write is smaller than 64 bits, the unused
2115 memcpy(&raw, &value, sizeof(value));
2119 MemWrite(ComputeMemOperandAddress(operand.GetMemOperand()), value);
2385 PrintRegisterFormat GetPrintRegisterFormat(T value) {
2386 return GetPrintRegisterFormatForSize(sizeof(value));
2389 PrintRegisterFormat GetPrintRegisterFormat(double value) {
2390 VIXL_STATIC_ASSERT(sizeof(value) == kDRegSizeInBytes);
2391 return GetPrintRegisterFormatForSizeFP(sizeof(value));
2394 PrintRegisterFormat GetPrintRegisterFormat(float value) {
2395 VIXL_STATIC_ASSERT(sizeof(value) == kSRegSizeInBytes);
2396 return GetPrintRegisterFormatForSizeFP(sizeof(value));
2399 PrintRegisterFormat GetPrintRegisterFormat(Float16 value) {
2400 VIXL_STATIC_ASSERT(sizeof(Float16ToRawbits(value)) == kHRegSizeInBytes);
2401 return GetPrintRegisterFormatForSizeFP(sizeof(Float16ToRawbits(value)));
2436 // "z31<2047:1920>". The total overall value indentation must also take into
2437 // account the fixed formatting: "# {name}: 0x{value}".
2445 // value annotations will be printed.
2565 void LogMemTransfer(uintptr_t dst, uintptr_t src, uint8_t value) {
2566 if (ShouldTraceWrites()) PrintMemTransfer(dst, src, value);
2579 void PrintMemTransfer(uintptr_t dst, uintptr_t src, uint8_t value);
2657 // the size of each access, and to format the accessed value.
2664 // instruction.) The traced value is read from this address (according to
2675 // The return value is a future_access_mask suitable for the next iteration,
2686 // Print an abstract register value. This works for all register types, and
2689 void PrintRegisterValue(const uint8_t* value,
2700 // As above, but format as an SVE predicate value, using binary notation with
2703 void PrintPRegisterValue(uint16_t value);
2705 void PrintRegisterValueFPAnnotations(const uint8_t* value,
2743 void SetColouredTrace(bool value);
2744 VIXL_DEPRECATED("SetColouredTrace", void set_coloured_trace(bool value)) {
2745 SetColouredTrace(value);
3002 // Configure the simulated value of 'VL', which is the size of a Z register.
3297 // Align saturated value to granule.
3310 uint64_t value,
3314 int64_t value,
3430 // Add `value` to each lane of `src1`, treating `value` as unsigned for the
3435 uint64_t value);
3593 // Subtract `value` from each lane of `src1`, treating `value` as unsigned for
3598 uint64_t value);
3851 // value of the last active (plus offset) lane, or last (plus offset) lane if
4838 double FPRoundInt(double value, FPRounding round_mode);
4839 double FPRoundInt(double value, FPRounding round_mode, FrintMode frint_mode);
4840 double FPRoundIntCommon(double value, FPRounding round_mode);
4855 int16_t FPToInt16(double value, FPRounding rmode);
4856 int32_t FPToInt32(double value, FPRounding rmode);
4857 int64_t FPToInt64(double value, FPRounding rmode);
4858 uint16_t FPToUInt16(double value, FPRounding rmode);
4859 uint32_t FPToUInt32(double value, FPRounding rmode);
4860 uint64_t FPToUInt64(double value, FPRounding rmode);
4861 int32_t FPToFixedJS(double value);
4991 // an unpredictable value, and made inactive in FFR.
4996 // value, regardless of pg.
5002 // FFR, the actual value loaded into the result is still unpredictable.
5146 // Next value of branch type register after the current instruction has been