Lines Matching defs:address
169 inline int GetAllocationTagFromAddress(uint64_t address) {
170 return static_cast<int>(ExtractUnsignedBitfield64(59, 56, address));
174 T AddressUntag(T address) {
175 // Cast the address using a C-style cast. A reinterpret_cast would be
177 uint64_t bits = (uint64_t)address;
182 // BranchInterception entry exists in branch_interceptions. The address of
209 // Generate a key for metadata recording from a untagged address.
211 uint64_t GenerateMTEkey(T address) const {
212 // Cast the address using a C-style cast. A reinterpret_cast would be
214 return (uint64_t)(AddressUntag(address)) >> kMTETagGranuleInBytesLog2;
225 int GetMTETag(T address, Instruction const* pc = nullptr) {
226 uint64_t key = GenerateMTEkey(address);
234 << (uint64_t)(address) << ".\n";
242 void SetMTETag(T address, int tag, Instruction const* pc = nullptr) {
243 VIXL_ASSERT(IsAligned((uintptr_t)address, kMTETagGranuleInBytes));
244 uint64_t key = GenerateMTEkey(address);
255 << ", the same tag is assigned to the address 0x"
256 << (uint64_t)(address) << ".\n";
264 size_t CleanMTETag(T address) {
266 IsAligned(reinterpret_cast<uintptr_t>(address), kMTETagGranuleInBytes));
267 uint64_t key = GenerateMTEkey(address);
321 // Search for branch interceptions to the branch_target address; If one is
324 // Check for interceptions to the target address, if one is found, call it.
356 bool IsMTETagsMatched(A address, Instruction const* pc = nullptr) const {
358 // Cast the address using a C-style cast. A reinterpret_cast would be
360 uint64_t addr = (uint64_t)address;
369 T Read(A address, Instruction const* pc = nullptr) const {
374 auto base = reinterpret_cast<const char*>(AddressUntag(address));
378 if (!IsMTETagsMatched(address, pc)) {
386 void Write(A address, T value, Instruction const* pc = nullptr) const {
390 auto base = reinterpret_cast<char*>(AddressUntag(address));
394 if (!IsMTETagsMatched(address, pc)) {
401 uint64_t ReadUint(int size_in_bytes, A address) const {
404 return Read<uint8_t>(address);
406 return Read<uint16_t>(address);
408 return Read<uint32_t>(address);
410 return Read<uint64_t>(address);
417 int64_t ReadInt(int size_in_bytes, A address) const {
420 return Read<int8_t>(address);
422 return Read<int16_t>(address);
424 return Read<int32_t>(address);
426 return Read<int64_t>(address);
433 void Write(int size_in_bytes, A address, uint64_t value) const {
436 return Write(address, static_cast<uint8_t>(value));
438 return Write(address, static_cast<uint16_t>(value));
440 return Write(address, static_cast<uint32_t>(value));
442 return Write(address, value);
1003 // Represent an SVE addressing mode and abstract per-lane address generation to
1006 // Contiguous accesses are described with a simple base address, the memory
1049 // Set `msize` -- the memory occupied by each lane -- for address
1080 // Full per-element address calculation for structured accesses.
1090 // Full per-struct address calculation for structured accesses.
1193 // Mark the address range for exclusive access (like load-exclusive).
1194 void MarkExclusive(uint64_t address, size_t size) {
1195 address_ = address;
1199 // Return true if the address range is marked (like store-exclusive).
1201 bool IsExclusive(uint64_t address, size_t size) {
1203 // Be pedantic: Require both the address and the size to match.
1204 return (size == size_) && (address == address_);
1223 bool IsExclusive(uint64_t address, size_t size) {
1224 USE(address, size);
1327 // Execution ends when the PC hits this address.
2032 T MemRead(A address) const {
2034 return memory_.Read<T>(address, pc);
2038 void MemWrite(A address, T value) const {
2040 return memory_.Write(address, value, pc);
2044 uint64_t MemReadUint(int size_in_bytes, A address) const {
2045 return memory_.ReadUint(size_in_bytes, address);
2049 int64_t MemReadInt(int size_in_bytes, A address) const {
2050 return memory_.ReadInt(size_in_bytes, address);
2054 void MemWrite(int size_in_bytes, A address, uint64_t value) const {
2055 return memory_.Write(size_in_bytes, address, value);
2507 void PrintRead(int rt_code, PrintRegisterFormat format, uintptr_t address);
2511 uintptr_t address);
2512 void PrintWrite(int rt_code, PrintRegisterFormat format, uintptr_t address);
2513 void PrintVRead(int rt_code, PrintRegisterFormat format, uintptr_t address);
2514 void PrintVWrite(int rt_code, PrintRegisterFormat format, uintptr_t address);
2517 void PrintZRead(int rt_code, uintptr_t address) {
2519 PrintZAccess(rt_code, "<-", address);
2521 void PrintZWrite(int rt_code, uintptr_t address) {
2522 PrintZAccess(rt_code, "->", address);
2524 void PrintPRead(int rt_code, uintptr_t address) {
2526 PrintPAccess(rt_code, "<-", address);
2528 void PrintPWrite(int rt_code, uintptr_t address) {
2529 PrintPAccess(rt_code, "->", address);
2533 void LogRead(int rt_code, PrintRegisterFormat format, uintptr_t address) {
2534 if (ShouldTraceRegs()) PrintRead(rt_code, format, address);
2539 uintptr_t address) {
2541 PrintExtendingRead(rt_code, format, access_size_in_bytes, address);
2544 void LogWrite(int rt_code, PrintRegisterFormat format, uintptr_t address) {
2545 if (ShouldTraceWrites()) PrintWrite(rt_code, format, address);
2547 void LogVRead(int rt_code, PrintRegisterFormat format, uintptr_t address) {
2548 if (ShouldTraceVRegs()) PrintVRead(rt_code, format, address);
2550 void LogVWrite(int rt_code, PrintRegisterFormat format, uintptr_t address) {
2551 if (ShouldTraceWrites()) PrintVWrite(rt_code, format, address);
2553 void LogZRead(int rt_code, uintptr_t address) {
2554 if (ShouldTraceVRegs()) PrintZRead(rt_code, address);
2556 void LogZWrite(int rt_code, uintptr_t address) {
2557 if (ShouldTraceWrites()) PrintZWrite(rt_code, address);
2559 void LogPRead(int rt_code, uintptr_t address) {
2560 if (ShouldTraceVRegs()) PrintPRead(rt_code, address);
2562 void LogPWrite(int rt_code, uintptr_t address) {
2563 if (ShouldTraceWrites()) PrintPWrite(rt_code, address);
2574 uintptr_t address);
2578 uintptr_t address);
2582 void PrintZAccess(int rt_code, const char* op, uintptr_t address);
2583 void PrintPAccess(int rt_code, const char* op, uintptr_t address);
2590 uintptr_t address);
2597 uintptr_t address);
2603 uintptr_t address);
2662 // address:
2663 // The address of this partial access. (Not the base address of the whole
2664 // instruction.) The traced value is read from this address (according to
2683 uintptr_t address,
2786 uint64_t address,
2788 // Verify that the address is available to the host.
2789 VIXL_ASSERT(address == static_cast<uintptr_t>(address));
2793 if (AlignDown(address, kAtomicAccessGranule) !=
2794 AlignDown(address + access_size - 1, kAtomicAccessGranule)) {
2799 if (AlignDown(address, access_size) != address) {
2805 if ((rn == kSpRegCode) && (AlignDown(address, 16) != address)) {
2886 void* address, size_t length, int prot, int flags, int fd, off_t offset);
2888 int Munmap(void* address, size_t length, int prot);
3089 size_t CleanGranuleTag(T address, size_t length = kMTETagGranuleInBytes) {
3093 meta_data_.CleanMTETag(reinterpret_cast<uintptr_t>(address) + offset);
3104 "starting at address 0x"
3105 << reinterpret_cast<uint64_t>(address)
3113 void SetGranuleTag(T address,
3117 meta_data_.SetMTETag((uintptr_t)(address) + offset, tag);
3122 int GetGranuleTag(T address) {
3123 return meta_data_.GetMTETag(address);
3126 // Generate a random address tag, and any tags specified in the input are
5179 bool CanReadMemory(uintptr_t address, size_t size);