Lines Matching defs:data
4568 // The architecture permits that the data read clears any exclusive monitors
4572 T data = MemRead<T>(address);
4578 if (data == comparevalue) {
4586 WriteRegister<T>(rs, data, NoRegLog);
4615 // The architecture permits that the data read clears any exclusive monitors
4689 // the placeholder data is buffered. As before, we expect to drain the whole
4945 T data = MemRead<T>(address);
4955 result = data + value;
4959 result = data & ~value;
4963 result = data ^ value;
4967 result = data | value;
4973 result = (data > value) ? data : value;
4977 result = (data > value) ? value : data;
4986 WriteRegister<T>(rt, data, NoRegLog);
5014 T data = MemRead<T>(address);
5026 WriteRegister<T>(rt, data);
5402 uint32_t Simulator::Poly32Mod2(unsigned n, uint64_t data, uint32_t poly) {
5405 if (((data >> i) & 1) != 0) {
5408 data = ((data & mask) ^ polysh32);
5411 return data & 0xffffffff;