Lines Matching refs:extend
324 // rm, {<extend> {#<shift_amount>}}
325 // where <extend> is one of {UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW, SXTX}.
327 explicit Operand(Register reg, Extend extend, unsigned shift_amount = 0);
335 // This returns an LSL shift (<= 4) operand as an equivalent extend operand,
368 VIXL_DEPRECATED("GetExtend", Extend extend() const) { return GetExtend(); }
403 Extend extend,
605 // SVE offers no extend modes for scalar-plus-scalar, so both registers must
612 // The modifier can be LSL or an an extend mode (UXTW or SXTW) here. Unlike
613 // in the core ISA, these extend modes do not imply an S-sized lane, so the
697 SVEOffsetModifier GetSVEOffsetModifierFor(Extend extend = NO_EXTEND) {
698 if (extend == UXTW) return SVE_UXTW;
699 if (extend == SXTW) return SVE_SXTW;
700 if (extend == NO_EXTEND) return NO_SVE_OFFSET_MODIFIER;
701 // SVE does not accept any other extend mode.