Lines Matching refs:base_
407 const Register& GetBaseRegister() const { return base_; }
453 return base_.IsValid() &&
461 return base_.Is(other.base_) && regoffset_.Is(other.regoffset_) &&
468 Register base_;
487 : base_(base),
506 : base_(base),
518 : base_(base),
533 : base_(base),
549 : base_(base),
559 : base_(base),
574 : base_(base),
600 return base_.IsX() && regoffset_.IsNone() &&
607 return base_.IsX() && regoffset_.IsX() &&
616 return base_.IsX() && regoffset_.IsZRegister() &&
621 return base_.IsZRegister() &&
622 (base_.IsLaneSizeS() || base_.IsLaneSizeD()) &&
627 return base_.IsZRegister() && regoffset_.IsX() &&
628 (base_.IsLaneSizeS() || base_.IsLaneSizeD());
632 return base_.IsZRegister() && regoffset_.IsZRegister() && (offset_ == 0) &&
633 AreSameFormat(base_, regoffset_) &&
634 (base_.IsLaneSizeS() || base_.IsLaneSizeD());
639 return base_.IsZRegister() || regoffset_.IsZRegister();
645 VIXL_ASSERT(base_.IsX());
646 return Register(base_);
650 VIXL_ASSERT(base_.IsZRegister());
651 VIXL_ASSERT(base_.HasLaneSize());
652 return ZRegister(base_);
710 CPURegister base_;