Lines Matching defs:reg
153 Operand::Operand(Register reg, Shift shift, unsigned shift_amount)
154 : reg_(reg),
159 VIXL_ASSERT(reg.Is64Bits() || (shift_amount < kWRegSize));
160 VIXL_ASSERT(reg.Is32Bits() || (shift_amount < kXRegSize));
161 VIXL_ASSERT(!reg.IsSP());
165 Operand::Operand(Register reg, Extend extend, unsigned shift_amount)
166 : reg_(reg),
170 VIXL_ASSERT(reg.IsValid());
172 VIXL_ASSERT(!reg.IsSP());
175 VIXL_ASSERT(reg.Is64Bits() || ((extend != SXTX) && (extend != UXTX)));
429 GenericOperand::GenericOperand(const CPURegister& reg)
430 : cpu_register_(reg), mem_op_size_(0) {
431 if (reg.IsQ()) {
432 VIXL_ASSERT(reg.GetSizeInBits() > static_cast<int>(kXRegSize));