Lines Matching refs:size
285 // The code size generated for a veneer. Currently one branch instruction.
286 // This is for code size checking purposes, and can be extended in the future
289 // The maximum size of code other than veneers that can be generated when
390 res += typed_set_[i].size();
394 VIXL_DEPRECATED("GetSize", size_t size() const) { return GetSize(); }
950 // must be aligned to 16 bytes on entry and the total size of the specified
974 // (Push|Pop)SizeRegList allow you to specify the register size as a
1029 // (Peek|Poke)SizeRegList allow you to specify the register size as a
1084 // must be aligned to 16 bytes and the size claimed or dropped must be a
1086 void Claim(const Operand& size);
1087 void Drop(const Operand& size);
5665 // No matter what the lane size is, overall this operation just writes zeros
6333 // The saturation is based on the size of `rn`. The result is zero-extended
6397 // The saturation is based on the size of `rn`. The result is zero-extended
8275 // Note that size is per register, and is specified in bytes.
8277 int size,
8283 int size,
8295 // Note that size is per register, and is specified in bytes.
8296 void PrepareForPush(int count, int size);
8297 void PrepareForPop(int count, int size);
8357 // SVE_MUL_VL). The ratio log2 of VL to memory access size is passed as